There are real limits to silicon technologies
It's all very well to talk of muliple layers (for memory chips) but there are physical limits:
1. Transistors cannot be made much smaller (only a few electrons per gate);
2. Larger chips are more likely to have defects so there is an incentive to minimise the chip's area;
3. So there is a limit to the two-dimensional organisation and sizing of a chip;
4. Use of the third dimension (multiple layers) depends on what those layers are used for: if it's mostly single access memory then only a tiny proportion is active and scaling is feasible; if (highly) parallel processing (or memory access) is the aim then the need for heat dissipation is a severe limitation to the number of active elements per unit volume.
Interesting that wetware, which does operate in 3 dimensions, has inbuilt cooling thanks to cardiovascular circulation.