Itanium IPC stalled?
So is the VLIW/EPIC dream of increased instructions/cycle over RISC/CISC designs dead, or did Intel just botch the Itanium design so badly that it can never deliver? In any event, moving to multiple-core chips may be the path of least resistance for now, but what happened to the talk about 20+ IPC per core from their Elbrus acquisitions?
Biting the hand that feeds IT
