"TSMC's 5nm process has crossed 50% yield according to the report (which is what the yield for 7nm supposedly is right now) [edit: seems to be a translation error] "
Yields have been >65% for AMD since moving to 7nm and low power designs were reportedly yielding around 80% so this sounds incorrect.
The following article suggests TSMC is actually 50% through their test cycle for 5nm - https://adoredtv.com/is-5nm-actually-at-50-yields/
My guesstimate is that puts them around 6 months away from being production ready. That should mean low power is available for test runs mid-2020 and production in Q4. High performance testing is likely to begin when low power is in production which puts production around Q1/Q2 2021. i.e. 5nm is on track.
The question for 5nm will be volume - EUV is significantly slower per etching unit than DUV (ASML quote EUV is 125 wafers/hour vs DUV at 275 wafers/hour and EUV isn't able to run continuously at present due to maintenance requirements for EUV source).