Re: Interesting effect, wrong explanation
I'm with you on this. Again, I spent a decade doing microprocessor validation at AMD & IBM. I wish a designer would jump in on.
From the standpoint of timing, cpus are NOT a bunch of transistors. They are clusters of transistors gated by clocks. The term "clock cycle" refers to the fact that the electrical changes coursing through some bit of a chip are "gated" until the appropriate moment in time. That inner loop, which will be optimized to the hilt by the hardware, will execute in a fixed number of cycles barring interrupts.
The only source of entropy in this code is the interrupts. And in a quiet system (and early boot systems can be very quiet), that's not going to generate very much noise at all.
It might be worthwhile to take a very careful look at experimental confirmation of these numbers. They seem rather optimistic, especially during boot.