Garbage recycling analogy
Whilst your analogy is clever, it doesn't really describe mainstream modern processors.
What you've ignored is hardware multi-threading like SMT or hyperthreading.
To modify your model, this provides more than one input conveyor to try to keep the backend processors busy, and modern register renaming removes a lot of the register contention mentioned in the article. This allows the multiple execution units to be kept much busier.
The equivalent to the 'independent code blocks' are the threads, which can be made as independent as you like.
I've argued before that putting the intelligence to keeping the multiple execution units busy in the compiler means that code becomes processor model specific. This is the reason why it is necessary to put the code annotation into the executable, to try to allow the creation of generic code that will run reasonably well on multiple members of the processor family.
Over time, the compiler becomes unwieldy, and late compared to the processor timelines, blunting the impact of hardware development. But putting the instruction scheduling decision making process into the silicon as in current processors increases the complexity of the die, which becomes a clock speed limit.
I agree that this looks like an interesting architecture, and that there may be a future in this type of processor, but don't count out the existing processor designs yet. They've got a big head start!