Re: Parallel data lines
Did you re-read Catt lately or try to design an motherboard?
The issue isn't on chip (Catt wasn't espousing the F100L, which was rubbish) but BETWEEN chips. PCB design of CPU to RAM is a horror story at high clocks and wide buses.
ICL was moribund long before Inmos. The UK was first with commercial computing, but by 1960s along with consumer electronics was destroying it. Read "The Setmakers".