RISCy?
Not sure why you would consider the NOVA to be "not a RISC". Decently orthogonal instruction set, fixed (well, two possible lengths IIRC, but could be thinking of later members of the family) instruction length, predictable (and deducible) instruction execution times, at most one operand changed per instruction...
As for Ferroeletric memory, I recall seeing a photo of a prototype from Bell Labs, back in the 1960s. It was only the substrate and metalization, with off-board drivers, but had either 64 (8x8) or 256 (16x16) sites. Again, I don't recall. But, yeah it has been possible to buy FRAM for quite a while. Just as it's still possible to find "bubble memory", although IBM calls the on-chip version "racetrack", and NCR's Thin-film memory has a new on-chip incarnation whose name and sponsor I can also not recall at the moment . Perhaps I need a new memory.
Biting the hand that feeds IT
