back to article Just ONE THOUSAND times BETTER than FLASH! Intel, Micron's amazing claim

Next year, the world will start using products with an amazing new type of memory in them - or so say Intel and Micron, allied to produce the 3D XPoint chippery. This is, we're told, a radical resistive-RAM technology that is bit-addressable, non-volatile, and forms a new memory tier between DRAM and NAND. That means software …

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    1. PleebSmash

      I want to know when smartphones and laptops will begin including 16-32 GB of 3D XPoint.

      There are supposedly some memory technologies like memristors that could reach into picoseconds of latency. However if this becomes widely available next year, Intel and Micron will be the vendors to define how "The Machine" vision is realized.

      1. Alan Brown Silver badge

        latency

        Bear in mind that DRAM latency hasn't improved much in the last 20 years, if you do the math on the wait states for DDR4 it's still about 50ns.

        If anyone starts selling memory which has picosecond access times then effective processing speeds would take a big jump - CPUs spend a _lot_ of time waiting on memory..

        As far as various storage technologies go: What matters most is that it works. How it works doesn't matter nearly so much, from an enduser point of view.

  2. Lamb0
    Alert

    A MAJOR breakthrough,

    this product will be priced rather high for a long time due to unmet demand. Embedded into controllers, drives, phones, motherboards, graphics cards for HEDP,... the mind boggles.

    1. bpfh Silver badge
      Stop

      Re: A MAJOR breakthrough,

      How much will they charge for this - compared to Flash for example?

      1. Down not across Silver badge

        Re: A MAJOR breakthrough,

        How much will they charge for this - compared to Flash for example?

        The article states "more than NAND, less than RAM".

        1. chris 143

          Re: A MAJOR breakthrough,

          If we say server memory at £5 per gig and the lower end server grade ssds at 50p per gig, I can think of a few applications that might be interested at £2 per gig for near ram like speeds

      2. PleebSmash
        Boffin

        Re: A MAJOR breakthrough,

        I bet it will be $2 - 3 per gigabyte

        1. elDog Silver badge

          Re: A MAJOR breakthrough,

          If everyone else is talking in standard currency units like pounds and pence, why do you bring up some non-standard stuff like $s? I think we should all standardize on oxen.

          1. HonestAbe

            Re: A MAJOR breakthrough,

            Fair point. Thousands of oxen or trillions of drachma. ;)

    2. DougS Silver badge

      @Lamb0

      Why would this be embedded in phones? Phones aren't limited by flash's speed or lifetime, so there is no reason to add something more expensive to get better performance on either metric.

      Until it can be produced in large enough quantities to allow its price to drop to where it replaces flash entirely, I think its usefulness will mainly to be to replace flash in applications where flash is either too slow or its lifetime is too short - basically meaning enterprise SSDs will be replaced by these. Consumer laptops don't need this, nor do phones, nor wireless routers, nor USB sticks, nor the BIOS on your PC's motherboard or many other places where flash is currently used.

      Those products won't switch from flash until this Micron thing is cheaper - which may not take that long since flash is running into some limitations for density increase this technology won't face. They've worked around it with "3D" NAND but the ability to add layers in that fashion is quite limited so it won't help for long.

      1. Steve Knox

        Re: @Lamb0

        Why would this be embedded in phones? Phones aren't limited by flash's speed or lifetime, so there is no reason to add something more expensive to get better performance on either metric.

        I think you're facing the wrong direction. If I were building phones, I'd be considering this as a potential replacement for mobile DRAM:

        Lower per GB cost

        Nonvolatile could* mean less power usage

        Lower speed should be ok given phone processors compared to server/PC processors.

        *unless, of course, the power needed to change a value is significantly higher than mobile DRAM. That's one of the pieces suspiciously missing from the article.

        1. DougS Silver badge

          @Steve Knox - using it to replace DRAM

          It will only work as a replacement for DRAM if it is addressable in a similar manner. We'll have to learn more about it to see if it is bit addressable. If it is block addressable like flash the block size must be no larger than your L3 cache line size or it can't replace DRAM.

      2. Richard 12 Silver badge

        Re: @Lamb0

        There's a lot of embedded systems which still use supercap/battery-backed SRAM, and a bit-addressable NVRAM would be a perfect replacement.

        Even at higher chip cost, because ultracaps and batteries are very expensive.

        Many of them don't use Flash due to the block-erase problem - lose power at the wrong moment while updating settings and the data is lost forever.

        1. Stoneshop Silver badge

          Re: @Lamb0

          Even at higher chip cost, because ultracaps and batteries are very expensive.

          I'd think circuit board real estate would be the primary factor

    3. lambda_beta
      Linux

      Re: A MAJOR breakthrough,

      " A MAJOR breakthrough"

      No .. if fact this idea was conceived back in the 70's by Leon Chau at UCal Berkeley. And in 1980 HP (Stanley Williams) produced memory elements that could shift resistance and hold their state and was reported in the magazine Nature. They were called 'memristors'. I wish someone would report the research from scientists and engineers rather than the companies which make the money from these ideas.

      As a side note, people are working on 'memcapacitors' and meminductors'.

      1. jimbo60

        Re: A MAJOR breakthrough,

        Meminductors? Are we going back to core memory?

      2. Andy 73

        Re: A MAJOR breakthrough,

        El Reg regularly reports on research, and regularly research goes nowhere, or takes decades to reach the consumer. Much of the excited research announcements turn out to be impossible to turn into a product that can be manufactured reliably, at scale and at a sane cost (see all of the articles on new battery technologies over the last 15 years).

        So, the companies that make the money aren't just taking ideas and pressing the magic 'sell one of these' button, but putting in immense product development effort to deliver them to end users.

      3. Cynic_999 Silver badge

        Re: A MAJOR breakthrough,

        The article specifically states that the elements are *not* memistors.

        1. lambda_beta
          Linux

          Re: A MAJOR breakthrough,

          he article specifically states that the elements are *not* memistors.

          No ... the article states "The cell material has its resistance changed between two levels". I believe that's called a memistors.

          1. This post has been deleted by its author

          2. HonestAbe

            Re: A MAJOR breakthrough,

            "I believe that's called a memristor." (scoff...) No. That's called RRAM, PCRAM, MRAM, or a dozen other restistive memory types that people have been working on for the last 40 years, some of which have been commercially available for a long time. Looks like Intel and Micron have stuck a warp drive on one of those, but we won't know the details until the product hits the shelves.

          3. Tom -1

            Re: A MAJOR breakthrough,

            @lambda_beta: try reading the first sentence of the article before claiming that it doesn't say that it's not the same as HP's resistance-based hopelessly over-running memory project based on Chua's research and Williamson's laoratory device (memristor - not sure why you dropped the "r" in you second post).

            Hopelessly over-running: HP in Oct 2011 announced commercial availability by April 2013; current HP estimate of commercial availability is 2018.

  3. TWB

    No more loading of apps?

    I wonder if this will allow apps to be run in-situ as it were - no more loading them into RAM, just a add a pointer in the active running list.. RAM would be the computer's scratch pad for stuff it is working on.

    This could really have a dramatic effect on what we think of as the typical architecture of a PC* - or maybe we are too set in our ways - interesting times ahead if it takes off.

    *I mean, CPU+RAM+STORAGE+I/O

    1. The little voice inside my head

      Re: No more loading of apps?

      Like Atari cartridges, self contained within a chip, no need to insert media, as long as it would be cheap.

    2. Charles Manning

      Re: No more loading of apps?

      What you're talking about is NVRAM.

      The article talks of read time and writing algorithms, so this does not sound like NVRAM. It is still flash-like.

      It is also not clear if the devices would support random access (like NOR flash) or page access (like NAND flash). I suspect it will be page access like NAND flash.

      NAND flash takes a while to read because the read command has to wait until the read logic settles. This can take a reasonably long time with the long NAND chains. After that there is still the overhead of doing the actual data transfer.

      Having been deeply embroiled with flash for the last 20+ years, it is interesting to see some competitors emerging.

      1. Anonymous Coward
        Anonymous Coward

        Re: No more loading of apps?

        While they could do something different in an actual implementation, the article states that in "crosspoint... the 1-bit cells are located at the intersections of word lines and bit lines, meaning the cells can be addressed individually."

      2. druck Silver badge
        Facepalm

        Re: No more loading of apps?

        Charles Manning wrote:

        It is also not clear if the devices would support random access (like NOR flash) or page access (like NAND flash). I suspect it will be page access like NAND flash.

        Did you not read the article? It clearly says the memory is bit addressable, so supports random access.

    3. PleebSmash
      Boffin

      Re: No more loading of apps?

      Intel/Micron Introduces Revolutionary 3D XPoint Technology: Memory And Storage Combined

      There were some early signs that Intel and Micron were going to shake up both the memory and storage market when Intel introduced commands for persistent memory, CLWB and PCOMMIT, last November... Intel indicated the new memory would connect to the host system via the PCIe bus, which is yet another reason that Intel and Micron have been vocal proponents of NVMe. The NVMe protocol was designed from the ground up for non-volatile memory technologies, and not NAND in particular. Now it is apparent that Intel and Micron were laying the groundwork for something more as they developed the new protocol.

    4. Big Ed

      Re: No more loading of apps?

      And if enough storage is provisioned, imagine the affect on big data applications... real-time faster than sh*t analysis; Hadoop's purpose in life totally nuetered.

      1. Ian Michael Gumby Silver badge

        Re: No more loading of apps?

        reverse...

        You've got it backwards.

        May toss a spanner in Tachyon though. Don't need it.

        There's more to it, but cant say. ;-)

      2. Gordon 10 Silver badge

        Re: No more loading of apps?

        utter fail.

        You're confusing a storage/memory hardware technology with a compute/storage application. If it becomes cheap enough hadoop would use it.

        Just like there is nothing apart from price stopping you from using ssd's on your hadoop cluster today.

        1. Big Ed

          Re: No more loading of apps?

          @Gordon 10 - Didn't make myself clear enough. The thought was that if you could load up your entire data lake persistent store into intel/micron hybrid memory, ala SAP HANA, you wouldn't need to replicate data into different storage locations to reduce storage contention as hadoop does.

          I'm thinking this hybrid store could be a boon to big data analytics.

  4. The Axe

    1TB uSD cards

    So 1TB uSD cards are on their way? Or even multi TB cards. How about storing a video of your life on a chip the size of your thumbnail?

    1. Anonymous Coward
      Anonymous Coward

      Re: 1TB uSD cards

      The article says the new memory is faster and more durable. I didn't see anything saying it was more dense.

      1. Anonymous Coward
        Anonymous Coward

        Re: 1TB uSD cards

        "The article says the new memory is faster and more durable. I didn't see anything saying it was more dense."

        Actually, the article said they were planning on making it just as dense as a flash chip for the first generation, but that the technology would scale better because it doesn't have the overhead of transistors.

        "An XPoint memory chip will store 128Gbits (16GB), meaning a 3D XPoint SSD will have the same capacity range as a current SSD using 128Gbit NAND chips that are 1 bit/cell, SLC, or single level cell NAND."

        "Memory cells are accessed and written or read by varying the amount of voltage sent to a selector. This eliminates the need for transistors, we're told, increasing capacity while reducing cost."

      2. PleebSmash
        Terminator

        Re: 1TB uSD cards

        The new memory is 10 times more dense than DRAM.

        The 128 Gb die is also 2 layers. Compare that to 32 layer V-NAND...

  5. Phuq Witt
    WTF?

    Lost: One Babel Fish. Reward Offered

    "...They aim to be the productizers of the technology..."

    Help! Someone make it stop!

    1. Anonymous Coward
      Anonymous Coward

      Re: Lost: One Babel Fish. Reward Offered

      I'll leverage that.

  6. asdf Silver badge

    hmm

    I wonder what HP's excuse will be now why The Machine will still be vaporware in 2020. Can't blame their memristor misadventures now. Still enough kicking that nearly dead horse, congrats to Intel and Micron if they can bring this to market. The market will reward them I am sure.

    1. Anonymous Coward
      Anonymous Coward

      Re: hmm

      I'd heard that memristor from HP/Hynix was a done deal, simply waiting for market conditions to be right. Never sell your best if you can sell your old product line for a while longer....

      Whilst 1000 times as many write cycles is better than FLASH, it's not as good as memristor which reportedly has no perceptable wear life problem at all. This makes Intel's solution unsuitable as a DRAM replacement. HP's memristor is also faster than DRAM, making it desirable as a DRAM replacement.

      If HP are ever going to do it, now's as good a time as any. Memristor can change computer architectures completely (by replace both DRAM and SSD with just Memristor), but it will take time for anyone to realise that they can make those changes and that the result would be better. Why bother with an SSD at the end of a PCIe bus when it could simply be an area of your CPU's RAM that just happens to be non-volatile?

      In contrast, Intel are essentially offering a much faster SSD type technology but still with the embuggerance of having to manange wear life. Good, but not the total revolution that HP's memristor could bring. I wouldn't be surprised if that small-step, same-as-before-but-faster quality of Intel's idea means that it dominates the market.

      1. PleebSmash

        Re: hmm

        1000 times as many write cycles = no endurance problem.

        Some applications won't even need much rewriting. Imagine a smartphone with 16 GB of this, storing the OS and a refreshed list of frequently used applications. Instant-on and speedy.

        1. Bronek Kozicki Silver badge

          Re: hmm

          If XPoint is going to be used as "cheaper and non-volatile" DRAM then it does have endurance problem. This can be made manageable by memory controllers, but that's another step to increased memory latency.

          What we have now appears to be simply another tier for large, fast and safe buffer of NAND writes (article does mention NVME on PCIe), which is great but it does not exactly warrant abandoning research into DRAM replacement technologies.

          For example, if such "DRAM replacement" technology (e.g. memristor) had latencies at two orders of magnitude lower than current DRAM (and apparently XPoint), it would enable immense jump in CPU (and GPU) performance by dropping the requirement for cache (see The Platform).

          1. Roo
            Windows

            Re: hmm

            I wish them luck with REX but it isn't a new idea (functionally it looks a lot like the 2D array of T800s I had fun with in the early 90s). I'm not convinced the REX folks have done their home work on the various tradeoffs involved. Case in point: driving fast edges down long wires (on or off-chip) is burns a lot of juice, and arrays of memory have long wires. That is why several layers of cache actually makes sense today - and I believe will continue to make sense until folks work out how to drive signals down long wires with zero latency.

      2. Anonymous Coward
        Anonymous Coward

        Re: hmm

        It sounds like you could do the same thing with the XPoint tech. It might be 50% slower than conventional RAM, but I'm pretty sure most of us wouldn't exceed the "40TB/day* for 5 years" limit that XPoint is supposed to have. Sure, your HPC cluster or HA server would probably want something faster and more durable, but the overall winner is likely to come down to which one is cheaper to produce. Memristors might get some slack for durability, but they're not going to be able to command a substantial price difference if you can replace the XPoint chips on failure for less than the memristor chips.

        Another thing is that motherboard architecture is going to need reworking to get the available speed out of either kind of chip. We can minimize the latency if we put either technology into an existing RAM slot, but at those speeds, they would easily max out a PCIe x16 slot.

        *40 TB/day ≈ 485 MB/s: A rather high bar to pass on average.

        1. Ian Michael Gumby Silver badge

          @AC ...Re: hmm

          Not sure why you're ac...

          But to your point...

          First, how close is this to Crossbar and their tech? (Cue the lawyers...)

          But more to the point... yes you can start to see the radical shift in terms of Server and potentially PC build.

          Imagine that they can get a greater density.

          So how small could you build a 'SoC' like chip with the power of an i7 or greater, 32GB DDR3+ memory, and then 4 of these or crossbar's chips with a density of 1TB each? I would imagine it about the size of an old Apple 4S, but not as thick. Now imagine an I/O power bus and then build a back plane / chassis that has 20 of them in a 4U box. HPC? maybe, but also a Hadoop/Spark/etc cluster in a box that can then still join w other boxes.

          You still need RAM, but less worry about swap to these.

          Things could get very interesting...

          1. Rik Myslewski

            Re: @AC ...hmm

            Even though Intel and Micron haven't revealed much, their tech does seem — at first blush, in any case — quite Crossbarian. Check out this and this, for example.

            1. HonestAbe

              Re: @AC ...hmm

              That is a crossbar lattice, but Crossbar, Inc. didn't invent crossbar lattices, which are ancient. The magic is in the physics, materials, and manufacturing process... but none of my google searches have revealed what physics Intel/Micron are actually using. All I've seen are rumors that it's PCM, based on performance criteria.

      3. asdf Silver badge

        Re: hmm

        >I'd heard that memristor from HP/Hynix was a done deal

        You know pump and dump is illegal right? (why the AC huh) If that was the case they probably wouldn't have hung their The Machine crew out to look like ass hats with nothing to show recently. Of course knowing HP dysfunction maybe they just really hate those guys.

        >It might be 50% slower than conventional RAM

        That is also the best case scenario speed wise i have heard for memristor tech as well.

      4. Roo
        Windows

        Re: hmm

        "I'd heard that memristor from HP/Hynix was a done deal, simply waiting for market conditions to be right. Never sell your best if you can sell your old product line for a while longer...."

        That has never worked well in the computing business, if that really is their master plan their failboat has already started it's one-way descent to the seabed.

      5. Charles 9 Silver badge

        Re: hmm

        "I'd heard that memristor from HP/Hynix was a done deal, simply waiting for market conditions to be right. Never sell your best if you can sell your old product line for a while longer...."

        That's a fair strategy for evolutionary tech where the competition can choose to leapfrog you and go two steps ahead instead. Not so for revolutionary tech that can result in a paradigm shift, meaning your existing tech can be obsoleted cutting off your revenues. In the latter case, who dares wins since they gain the critical advantage of the first mover. If the market develops to be such that it can't support a lot of suppliers, you definitely don't want to be left behind.

        1. HonestAbe

          Re: hmm

          Exactly. "The dog ate my homework, and I didn't launch my breakthrough because it was just too darn good."

  7. Joerg

    It will be a success in Datacenters and HPC only at high prices...

    Until the price gets low and SSDs with this new tech won't be available at anything more than a +30% to +50% higher than current Flash NAND SSDs then there will be no mass market for it.

    The flawed SSDs NAND will keep selling unfortunately.

    1. PleebSmash

      Re: It will be a success in Datacenters and HPC only at high prices...

      It can be used as a cache inside of SSDs, or as a new storage tier for any product imaginable.

    2. Anonymous Coward
      Anonymous Coward

      Re: It will be a success in Datacenters and HPC only at high prices...

      I'm more than willing to pay a 50% premium for this technology. Since I like living on the bleeding edge, +400% is not something that I'll even blink at paying. If I can get a couple in memory stick form factor, I have 10 or more machines to stick them in to play with. Ooooh!

      1. VeganVegan

        Re: It will be a success in Datacenters and HPC only at high prices...

        I also like new toys, and am willing to pay more to play.

        However, in this case, the speed of the beast is such that the usual interfaces, including USB, SATA are much to slow. It'd be a waste to put it in a memory stick with an USB interface. It would be like putting a formula 1 car on rutted country road.

        To really get a feel for the speed, you'd need PCIe (gen 3, perferably, or Thunderbolt 3), that or NVMe.

  8. Six_Degrees

    Shut up and take my money.

    1. Pascal Monett Silver badge

      Damn right. I don't care if people think that "consumer desktops don't need the speed" - I want that speed along with its reliability.

      I have 2 120GB SSDs on my main rig right now - I am ready and willing to replace them with similar-sized SSDs based on this new tech in the blink of an eye.

      I have a 4-slot NAS with 4 3TB disks in it, and I am positively drooling at the idea of replacing them with 3TB disks with this tech - of course, that's not going to happen next year, but it will.

      Ah, technology is marvelous.

  9. Craig Vaughton

    Just imagine...

    ..if someone could come up with battery technology that delivers advances as big as this claims to do, we'd all be queuing up to buy it.

    1. HonestAbe

      Re: Just imagine...

      It probably does translate into battery life (though not 1000x). Less DRAM means less power drain. It will interesting to find out in coming months how many OEMs have already been queuing up to buy it.

  10. Anonymous Coward
    Anonymous Coward

    It is about time

    Finally, one of the concepts being played around with in the labs is being mass produced. They have only been three to five years away for 10 to 15 years now.

    1. Anonymous Coward
      Anonymous Coward

      Re: It is about time

      +1

      We were supposed to have fusion in the 1970s.

      1. asdf Silver badge

        Re: It is about time

        >We were supposed to have fusion in the 1970s.

        You mean controlled fusion power generation. We have had fusion since the early 1950s (obviously). Still where they hell is my Jetson's car and the Jetson's two day a week one hour a day work schedule?

        1. David 132 Silver badge
          Happy

          Re: It is about time

          We have had fusion since the early 1950s (obviously).

          Technically, we've had the benefits of fusion energy for a little longer than that.

          I admit, I work in IT so can't vouch for this first-hand, but I'm told there's a large fusion reactor glowing yellow in the sky.

          You know. Outside.

          1. Anonymous Coward
            Anonymous Coward

            Re: It is about time

            So heretics really do burn in hell ('outside'), then?

          2. asdf Silver badge

            Re: It is about time

            Yes I was almost feeling pedantic enough to bring up the sun but figured had to at least keep to man made energy generation. As for jazz fusion at least its not that noise that sounds like grade schoolers warming up Avant-garde (shudder).

        2. Anonymous Coward
          Anonymous Coward

          Re: It is about time

          Ummm...we've had fusion since the sun lit up. It does seem to power pretty much every form of life on this planet, directly or indirectly. And quite a few things from past lives in the form of trapped hydrocarbons.

        3. breakfast
          Coat

          Re: It is about time

          I reckon they meant the fusion of Jazz and rock favoured by bands such as Weather Report, which we actually have had since the 1970s, so no cause for complaint there really.

  11. channel extended
    FAIL

    Vaporware again.

    Everytime I see the 'NEW BREAKTHROUGH" of whatever tech is popular at the moment, there is no mention of a date. It could offer a million time faster access and still be a lie. I wish the authors had stopped for just a minute and asked 'show me'.

    In the 1950's I was promised flying cars. In the 1960's flying rocket packs. ........In the 2015's I was promised faster memory!!

    1. PleebSmash
      Thumb Down

      Re: Vaporware again.

      There are two dates mentioned: 2015 for sampling to vendors, 2016 for product launches.

      That's an aggressive timeline. It is not the "5 years away" or "20 years away" of a stuck-in-lab discovery.

      If it's vapor, it will clear away pretty fast.

  12. lambda_beta
    Linux

    One of the greatest computers made for home use!

  13. ckm5

    It's core memory all over again!

    Or maybe bubble memory.... Certainly seems like an old architecture re-applied to a smaller scale....

    https://en.wikipedia.org/wiki/Magnetic-core_memory

    https://en.wikipedia.org/wiki/Bubble_memory

  14. Anonymous Coward
    Anonymous Coward

    If the latency is below 20ns then it is perfect for recall based AI. Actually someone just elided some of my code related to that. No matter. 'Tain't nothin'.

  15. James Wheeler

    Exciting, but...

    I recall a conversation about 25 years ago where a colleague and I agreed that flash memory was going to make spinning rust obsolete. It's happening now, but took a lot longer than we expected because rotating drives kept getting smaller, denser, cheaper and more reliable. The adoption curve for post-NAND technology may be similar, though I hope not.

    1. VeganVegan

      Re: Exciting, but...

      Yes, I remember giant magneto resistive technology for the read/write heads, followed by colossal magneto resistive technology, then super-colossal. I lost track at that point, as the naming convention started reminding me too much of the size-grading of olives and shrimp.

  16. DocJD

    A few clarifications

    It is called 3D memory because bits can be stacked. As shown in your drawing, it is presently at 2 bits high. (This is what they meant by "two layers" not that there are only two layers in the fabrication process.) Bit stacking can be done because the storage is not making use of the single crystal silicon substrate. As long as they can access the various layers of word and bid lines, they can keep stacking the bits.

    There ARE transistors on the chip. They are NOT in the memory cells but will be around the perimeter to decode the address, read the signals from the bits and convert them into the appropriate output voltage and send the appropriate signals to write bits. (Although the chip is random access, they will almost certainly read and write Words and not single bits.)

    The reason a resistive memory cell can be scaled down farther than present memories:

    •DRAM storage depends on the area of the capacitor to store charge. If the area gets too small the amount of charge becomes harder to detect.

    •Flash depends on charge of a floating gate. Again, as the gate gets smaller the amount of charge is limited and you have to move it closer to the channel of the transistor (thinner insulator) to modify the threshold voltage. If the gate is too small and the insulator too thin, small amounts of leakage can degrade the storage time.

    •A variable memory material will have the same ratio of Low to High resistance no matter how small the bit is as long as the cross sectional area and thickness of the storage volume keep the same ratio as it scales down. It is possible, depending on the resistance change mechanism, to have a lower size limit. For example, phase change memory could be limited by how large the bit must be to exhibit crystalline characteristics, since the surfaces of the volumetric bit will be influenced by the materials on which or to which it is in contact and not be crystalline for some skin depth.

    1. stanimir

      Re: A few clarifications

      •A variable memory material will have the same ratio of Low to High resistance no matter how small the bit is as long as the cross sectional area and thickness of the storage volume keep the same ratio as it scales down.

      Won't scaling it down (and depending of the frequency) a lot make the resistors act like capacitors in some cases?

      1. DocJD

        Re: A few clarifications

        Resistance = (Resistivity of the material) ÷ (cross sectional area of the resistor perpendicular to current flow) x (length of the resistor in direction of the current flow) [I could write the equation, but have no idea how to get the Greek letter rho for resistivity into my text.)

        If you keep the same aspect ratio and scale all dimensions proportionally by a factor "s", the resistance will go change 1/s (you have s/s^2). So if everything is made 1/2 the size the resistance will go up by a factor of 2.

        But notice that, when you calculate the ratio of a given resistor in its high and low resistance states, the area and the length cancel out, leaving only the ratio of the two resistivities, which only depend on the materials parameters and not on the actual size.

        As you get really small, the sense current will decrease for a given length and area. If you can then shorten the length (i.e. make the layer of resistance material thinner) you can bring the resistance back down and the sense current back up. Luckily, it is much easier to shrink a deposited thin film thickness than it is to change the dimensions of the photolithograpicly patterned area, so there is a very long way to go before this is a limit.

        1. This post has been deleted by its author

  17. Andy The Hat Silver badge

    Either, or?

    Perhaps "Xpoint or memrister?" is the wrong question.

    What if production grade memrister exists (big assumption but for the sake or argument), it's super fast but costs the same or even double DRAM?

    Wouldn't that open the window for machines with primary store being 'expensive' memrister with the secondary, 'cheaper' but relatively slower storage being Xpoint? Lower power, *much* more speed both to primary and secondary storage, higher board density, no wear levelling problems on the primary store and effectively none on the secondary ... basically a screamer of a memory system for a few dollars more (at production) or, as it's a 'premium' system double the cost (for the user) making nice sales figures for everyone concerned.

    Everyone wins apart from DRAM, NAND and spinning rust manufacturers.

  18. TaabuTheCat

    Manufacturing capacity

    Why do I get the feeling the biggest problem with this technology will be making enough of it?

    1. Charles 9 Silver badge

      Re: Manufacturing capacity

      You can say the same thing of 3D Flash. It always takes time for production to ramp up. Thing is, this new tech appears to be lagging 3D Flash only be a few months. If it really is everything it claims to be, it has the potential to strangle 3D Flash in the cradle, before it can really break out into the mainstream.

      1. Bronek Kozicki Silver badge

        Re: Manufacturing capacity

        This probably won't do anything bad to 3D Flash. This technology is more expensive that NAND, you are not going to get economy of scale with imaginary terabyte-sized drives in this technology (without of flash). What you might get instead is terabyte-sized drives made with 3D Flash and with insane write speeds/IOPS thanks to large (tens of GB) write buffer in XPoint.

    2. David 132 Silver badge

      Re: Manufacturing capacity

      Why do I get the feeling the biggest problem with this technology will be making enough of it?

      Well, if there's one thing Intel are very good at, it's large-scale semiconductor manufacture. And once a fab plant's built, the #1 concern is to keep it busy.

      So I don't have too many concerns in that area.

    3. DocJD

      Re: Manufacturing capacity

      The perimeter circuitry will be standard CMOS and does not have to push state of the art FET design because it will occupy such a small percentage of the chip. That makes it easy to manufacture the electronics.

      The manufacturing problem will involve whatever the exotic material is that they use for the resistors. Certain elements can, even in very small quantities, contaminate CMOS enough to cause problems like junction leakage. If the resistor material contains such elements they will have to use a dedicated manufacturing line to avoid contaminating other products. If the contamination is critical enough they will have to use a barrier layer to avoid contaminating the FETs out at the perimeter. Luckily, depending on how the material is deposited, it is probably at a fairly low temperature and will have a low diffusion constant.

  19. Anonymous Coward
    Anonymous Coward

    > by an undisclosed process

    So they're not patenting the technology then. That's risky.

  20. DugEBug
    Thumb Up

    NUMA, not SSD

    There is little point in putting this new NVM technology on an SSD or any other I/O device. I/Os are too slow and too high latency to take advantage of this technology. Instead, it should be put on the memory bus and treated as slow memory. Intel will need to build a new memory bus, or Micron will need to make DIMMs with hybrid DRAM/NVM.

    The 'revolution' that this technology enables will only be realized when the programming paradigm changes. Is there an OS out there that can handle non-uniform memory access efficiently? Is there a programming language out there that can begin to help engineers write code with multiple classes of memory, including NVM?

    A LOT of stuff needs to be re-thought/rewritten. Better get started - big bucks await those who succeed.

    1. Anonymous Coward
      Anonymous Coward

      Re: NUMA, not SSD

      Not really. NVMe and PCI(e) memory mapping provide a good transitional step. By memory-mapping the NVM, it can already treated like a slow memory under specific conditions (the 64-bit address space assures we shouldn't run out of mapping space anytime soon). It's just not done that way right now due to "habit". Once more devices see the NVM as less a drive and more a memory, then the OS logic will be in place and the hardware can take the next step to move it from an I/O bus to a memory bus (preferably distinct from the DRAM bus so they're not locked together). From there, it's just a matter of the OS supporting it after it's already used to the idea.

    2. stanimir

      Re: NUMA, not SSD

      Is there an OS out there that can handle non-uniform memory access efficiently? Is there a programming language out there that can begin to help engineers write code with multiple classes of memory, including NVM?

      it can be done currently with linux (or windows/solaris) and any language that allows file mapping - mmap(2)[0]. The memory has be mounted as file system similar to how ram disks /dev/shm

      mmap is the standard way to allocate memory in linux, so support in C is just natural. Java[1] supports memory mapped files and so on.

      In short the mechanism is there already for a very long time.

      [0]: http://linux.die.net/man/2/mmap

      [1]: http://docs.oracle.com/javase/7/docs/api/java/nio/channels/FileChannel.html#map(java.nio.channels.FileChannel.MapMode,%20long,%20long)

  21. Anonymous Coward
    Anonymous Coward

    Hold the applause...

    ...until reality sets in and we find how well it actually performs real world.

  22. Miss Config
    Pint

    Bloke at BBC tested Cortana as shown on the BBC News today.

    At 1:19 here he asks out loud for a London weather forecast

    and Cortana speaks back :

    http://www.bbc.com/news/technology-33689332

    1. Adam JC

      I.... I think you've commented on the wrong thread here mate? :o)

  23. John Savard Silver badge

    Read the Fine Print

    But it's only ten times denser than DRAM!

    Actually, that's not a bad density - but it is significantly less dense than flash. So being less dense, and more expensive, per bit, it won't make flash memory totally obsolete. Although I like the fact that it will survive more write cycles.

    It will be very useful, I agree.

    1. HonestAbe

      Re: Read the Fine Print

      "Only ten times denser than DRAM"... but presumably infinitely stackable because it won't overheat. It will be interesting to see what the 2017 version looks like, in both process shrink and number of layers.

      1. DocJD

        Re: Read the Fine Print

        You are correct, HonestAbe!

  24. Anonymous Coward
    Anonymous Coward

    RE. Re: Read the Fine Print

    So when will my 1TB microSD UHS-3 be available?

    Its up to 200GB so far, about $629 last time I checked (still too expensive) but if the write speed is reasonable then this technology could go far.

    1. Charles 9 Silver badge

      Re: RE. Read the Fine Print

      Still that 200GB SD represents the limit I think in terms of flash on SD. The dimensions of the card are now constraining what chips can go into it three-dimensionally. Thus 200GB instead of 256GB as it should be.

  25. TopCat62

    Excellent. Just in time for the Chinese to buy Micron.

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