back to article Samsung rolls out first mass-produced 3D NAND flash memory chip

Samsung has announced that it has begun volume production of what it characterizes as "the industry's first" vertically stacked NAND flash-memory chip. Samsung's mass-produced 3D vertical NAND (V-NAND) chip Behold the industry's first mass-produced three-dimensional NAND flash chip (click to enlarge) "Following the world's …

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  1. Arctic fox
    Headmaster

    "May the best chip – or chips – win."

    Fascinating developments. Those who have recently been proclaiming the death of Moore's Law may have to think again.

    1. Destroy All Monsters Silver badge
      Paris Hilton

      Re: "May the best chip – or chips – win."

      But these are not CPUs?

      1. Stoneshop Silver badge
        Boffin

        But these are not CPUs?

        Moore's Law does not apply solely to CPUs: he predicted that chip density would double every 18 months. It applies to RAM, ROM, Flash, FPGAs, CCDs and even ordinary logic chips just the same.

        1. Destroy All Monsters Silver badge

          Re: But these are not CPUs?

          But isn't that cheating? A CCD cell is way simpler than an SRAM cell for example.

          1. ZanzibarRastapopulous

            Re: But these are not CPUs?

            Moore's law still doesn't apply, the feature size hasn't reduced they've just stacked more wafers in a single chip.

            Any cost saving from doing this is down to fewer parts to be soldered which, as it's all automated, is naff all.

            I'm not sure what the point is. It's not like flash drives are short on real-estate. I for phones there's a gain in having a single chip. So it's not that exciting a development.

        2. TechicallyConfused
          Happy

          Re: But these are not CPUs?

          Actually the 18 month time frame was a different Intel CEO predicting that chip performance would double due to more, faster transistors.

          Moore's law was an observation that the number of components on integrated circuits had double every year since . . [a date I cant remember] until [another date I can't remember] and would continue to do so for [a period that I don't recall but is somewhere between 10 and 20 years].

  2. frank ly

    re. photo of V-NAND package

    Why does it have a window on the top? I'm tempted to think that it's a 'prototype marketing' package to convince people that there really is some high-tech-stuff inside.

    1. Louis Schreurs BEng

      Re: re. photo of V-NAND package

      Of course it is to erase the resistance!

      1. Destroy All Monsters Silver badge
        Coat

        Re: re. photo of V-NAND package

        > Of course it is to erase the resistance!

        Just send in Vader!

    2. swissrobin

      Re: re. photo of V-NAND package

      Assuming you're serious ...

      That's a development or presentation DIL (dual in line) package. The window allows you to "see" the die.

      Back in the 70s chips actually looked like that, of course, but these days chips are packaged in much smaller devices - like the ones at the top of the page - where the gap from contact to contact is approx 0.5mm instead of 2.54mm in the DIL package.

      The main use for windowed packages like this in years gone by was to allow you to UV erase EPROM before EEPROM and flash came along (these are electrically erasable, so no need for a UV eraser).

      1. frank ly

        @swissrobin Re: re. photo of V-NAND package

        "That's a development or presentation DIL (dual in line) package. The window allows you to "see" the die."

        I was totally correct then (apart from exact terminology). I do remember UV EPROMs and sticking thick black tape on top after they'd been programmed, 'just in case'.

    3. D bex

      Re: re. photo of V-NAND package

      It’s not even a “prototype marketing” package its just something the graphic designer has created to look nice.

      The clue is complete absence of bonding wires – between die and package – and from the die in BGA packages I have cut apart the connection points are in fact on the reverse side of the die making it impossible to mount in a ceramic dip package.

      1. Destroy All Monsters Silver badge
        Coat

        Re: re. photo of V-NAND package

        It’s not even a “prototype marketing” package its just something the graphic designer has created to look nice.

        A closer look reveals that this is just good-looking 3D graphics someone whipped up on an iPhone during lunch hour.

    4. Mage Silver badge
      Black Helicopters

      Re: re. photo of V-NAND package

      Why does it look like a 1970s Military grade EPROM?

  3. John Smith 19 Gold badge
    Go

    Interesting figures,

    If they hold up sounds good.

    16GB on a single chip.

    We've come a long way.

  4. Zot

    I've waited thirty years for...

    ... memory to be 3D structures. But I wanted them to be perfect translucent little cubes! Nearly there. ;)

  5. Anonymous Coward
    Anonymous Coward

    released now, just as RRAM is to make its entrance.

    1. DropBear Silver badge

      Yup, NAND is dead, it just doesn't seem to know it yet. RRAM & company is about to wipe the floor with it - it doesn't really matter f it will take one year or five.

  6. Jon Green

    What's not clear...

    ...is how the new devices differ from existing technologies in terms of write durability. Samsung talk about reliability, but this could equally well refer to whole-device failure: they make no assertions about the mean time before failure per cell based on number of write/erase cycles, and this raises my suspicions.

    1. 0_Flybert_0
      Boffin

      Re: What's not clear...

      I dunno .. Samsung usually has their shit together and would expect a new production product is going to exceed the competition in most specs and params .. rather than suspicious ..

      have to wonder where else Samy might use the "3D" tech .. ARM chip maybe ? SoCs ?

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