Vacuum tube (aka valve)
"one of the designers, Eric Schlaepfer, a vacuum tube enthusiast".
I know what I want to see. A combined valve 6502 and bbq!
The 6502 CPU is a fondly-remembered CPU* for good reason: along with chips from Motorola, Intel and Zilog, it helped create the personal computer business in the 1980s. However, this project is affection on a grand scale: some US enthusiasts are creating a transistor-for-transistor replica of the chip's design using discrete …
> I know what I want to see. A combined valve 6502 and bbq!
I want to see a complete Commodore PET built out of discrete transistors!
The CRT and cassette deck can remain as-is.
If I remember rightly, the base model had 4K RAM and 8K ROM, so it should be doable. I used to type in about 3KB of BASIC interpreter in hex to a Hewart Microelectronics 6800. Hand-positioning jumper links would be a bit more tedious (but perhaps could be automated with a pick-and-place robot?)
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My first experience with a microprocessor was in the mid 80s. The motherboard was about 2ft square, and covered with components. As for the "couple of hundred KHz" I can't remember it topping 100kHz.
We used to program it in machine code, when we ran our first BASIC program it took so long we thought the ROM was broke.
> Wouldn't the RAM alone require 8192 transitors? (each bit in a bistable transitor circuit).
4KiB is 32,768 bits, so it will be that times the number of transistors per SRAM cell ( a small number)
Given that the single PCB in the photograph has 3,218 transistors, that's hardly going to "fill a warehouse". Maybe a 4U rack box.
Our mechanical 'Comptometers' (and a few 'Marchants' for the really expert girls who were qualified to multiply) were noisy on steel desks, so they sat on thick hairy felt pads. When the first big 'electronic' calculators came in, same size, the felt pads were retained by habit, and blocked the ventilation. If you put pies on top at coffee time, they'd be piping hot by lunch. Met a few nice girls that way, who warmed my pies. Down in the PCB shop they had Paxolin ovens which were much better, but only run by blokes.
It turns out I can still remember 6502 assembly op-codes...
I think I can only remember A9 (LDA, immediate mode?) and EA (NOP).
For shits and giggles, I tried to write a Hello World program without looking stuff up. Can't remember exact instructions and addressing modes, but I think it might go something like ...
SCREENBASE EQU XXX
TEXT DB "Qbrf vg jbex?"
DB 0
CLX ; (clear X?)
loop: LDA (TEXT,X) ; (do loads set flags? does this need Y-index addressing?)
JZ done
TAY ; (Y <- A?)
AND 0x20
PUSHA ; (remember case)
TYA
OR 0x20 ; (make lower-case)
CMPA 'a'
JLT fix_case ; (A < 'a'?)
CMPA 'z'
JLE rot
fix_case: POPY ; get back case bit
ORY ; (A <- A or Y?)
STA (SCREENBASE,X)
INX
JMP loop
rot: ADDA 13 ; (or just ADD 13?)
CMP A, 'z'
JLE fix_case
SUBA 26
JMP fix_case
In the UK that 6800 evaluation kit cost over £160 in 1976 - with its full complement of 1KB of static RAM. That's the equivalent of a couple of thousand pounds now. Dwarfed by my Apple II from New Bear three years later at £1780 (circa £6K now).
The 6800 kit was a DIY soldering job. It came with the circuit board and the Motorola large chips like CPU, RAM, UART with pre-production "XC" markings. You then had to go and buy the discrete components.
Having had bad experiences with early MOS transistors and static - I built it in the office one evening stripped down to my cotton underpants. It was only later I realised that tantalum capacitors were polarised. Fortunately I had soldered them in aesthetically - so getting the first one the right way round was fortuitous. Even the couple at right-angles were the right way round.
Lackingt a 'scope to set it up - the two clock pots were adjusted until it ran. Not having the necessary Teletype handy at that instant - the voltages on the bus were measured to show the expected idle loop activity. A check with a 'scope later showed it was over-clocking - which explained why one instruction was always giving a one bit error.
As Herby says the applications manual was enormous with simple circuits for bar code readers, keyboards etc - all driven at low level to do things like key de-bounce. Our first application was to hook it up to one of the mainframe terminal room Teletypes. Watching an unsuspecting colleague being refused a login was not only puerile amusement - but also impressed us to microprocessors' capabilities - if only they had a lot more RAM.
The 6800, 68000, and 6502 were logical orthogonal instruction sets like the IBM 360. The Intel instruction sets always seemed far more arbitrary - so I never learned to program the 8080 etc at assembler level.
I still have a brand new "wide-bodied" Motorola UART chip in my boxes of 74' TTL etc components.
"The 6800, 68000, and 6502 were logical orthogonal instruction sets like the IBM 360. The Intel instruction sets always seemed far more arbitrary - so I never learned to program the 8080 etc at assembler level."
The 6502 wasn't that orthogonal, certainly not when compared to the 68000 or the ARM for example (IIRC you had to use different registers, either X or Y, for different addressing modes etc)
From memory, yes: the X and Y registers had different capabilities when it came to the indirect/offset addressing modes.
I remember when I first figured out what one of the more obscure ones actually did, and then wondered if there was ever a useful use for it. Like you do I searched the entirety of both of the C64 ROM chips and couldn't find the instruction in use. Not a definitive use case, but it was what I had available at the time...
"From memory, yes: the X and Y registers had different capabilities when it came to the indirect/offset addressing modes."
Wasn't only Y usable for offset addressing? Load base address in Y, and then use one-byte offset as an argument for a command. Much faster than using two-byte addresses. Also, there were some register ops available to work with contents of Y - that had no counterparts for X.
If I remember correctly, X and Y were used differently for indirect addressing thus
LDA (aa,X) added X to the operand aa, and the contents of memory at (aa+X) and (aa+1+x) were used as the address from which A was loaded.
LDA (aa),Y took the data from (aa) and (aa+1) as an address and then added Y to that. A was then loaded from that total address.
The first was useful if you had a list of pointers to objects, the second was useful if you had one pointer to an object, but wanted to access data from a particular offset into that object.
@Simon Harris
That sounds right. I suppose we could lookup the 6502 instruction set but it's quite interesting how well the instruction set comes back to memory despite so many years of not using it. I remember reading through it all in detail when teaching myself 6502 (6510) assembler as the C64 came with great manuals, particularly the Programmers Reference Guide(?).
Well, the 6100 was based on the PDP8, so you could copy the PDP8s design (that one used discrete transistors).
The next step would be to recreate your discrete version of the 6100 as a FPGA. Then you'd have an integrated version of a discrete version of an integrated version of a discrete transistor CPU.
While capacitance and distance issues are certainly real, computers made from discrete transistors achieved speeds high enough to allow them to do useful work back when computers were made from discrete transistors.
Thus, the original PDP-8 ran at 666.67 Kilohertz, the SDS 9300 ran at 571.43 Kilohertz, the KA-10 chassis version of the PDP-10 ran at 1 Megahertz, and the CDC 6600 ran at 10 Megahertz.
The high capacitance is probably due to the packing density putting relatively large chunks of conductors in close proximity to each other. I don't think distance (within reason) is too much of an issue for 1 MHz operation, spreading things out with a single layer board and classical discrete components might have been a better option. Open up a CDC6600 and you would find 4 large bays loosely packed with modules interconnected with wiring (usually twisted pairs) up to a couple of metres long. Use of emitter coupled logic and finely crafted tuning were critical to achieving the speed.
"[...] packed with modules interconnected with wiring (usually twisted pairs) up to a couple of metres long"
On the prototype English Electric 4-70 it was not unusual to see a long twisted pair wire that had been added during testing to give an extra signal delay. A calculated so many nanoseconds per length.
I was wondering this first when I realised that the original AT motherboard ran at 5MHz and was not much smaller (13.8" x 12").
I think the PCB size itself does not necessary limit the speed so much. However, if the CPU is simply a transistor for transistor substitution from the die to the PCB without any redesign, simply scaling things up might well scale up parasitic capacitances and time constants. Also, the 6502 used some dynamic registers (essentially single byte DRAMs) to reduce transistor count - scaling up the storage capacitor might also limit the clock speed by increasing the charge/discharge time constant.
I presume the 1960s transistor based computers running in the MHz range were designed on the macro-scale to control these capacitances in the first place.