And the superconductor from the title is where exactly?
Scientists at Vanderbilt University have created a silicon-based supercapacitor they say could scale all the way from grid-level storage down to consumer electronics. The reason they're trumpeting it as a breakthrough is that silicon, while abundant and with well-established fabrication techniques, doesn't work well in …
And the superconductor from the title is where exactly?
Perhaps it's the graphene or perhaps it was supposed to read supercapacitor.
Pretty super either way.
Someone at El Reg came home from a pubxpedition late and wrote something that started with "super". Be glad it didn't turn out to be "superancilliary", that would be hard to read.
You think that's bad, I read both superconductor and supercapacitor as 'supercomputer'. I couldn't work out what was so special about having computers on silicon... (other than the fact it is generally pretty bloody amazing that anything is made on silicon). I think I need another cup of tea.
Super-whatever-it-is, it's damn clever!
Picky, picky, picky... :-) I read it as Supercalifragilistic...
Not a super callused fragile mystic, hexed by halitosis?
How do they control the superviolin section?
No need to be supercilious about it.
If I've read those numbers right the battery pack for a Tesla Model S (85Kwh) would weight 17 metric tons if built from this technology.
Did you mean... would weigh 17 tonnes if built from this technology.
Tonne = Metric, Ton = Imperial.
No idea whether your calculation is correct but the point about super capacitors is the very rapid charge and discharge capability and the number of cycles. They have nothing like the energy density of a battery. They can be used where batteries cannot and often make sense in conjuction with a battery to handle pulse power demands for example in a GSM mobile phone they make sense in addition to the lithium cell to make the most of the battery by evening out demand. Improvements to super caps are useful and integration within an IC is intriguing although I suspect a long way off. Integrating decoupling capacitance which needs good high frequency response seems a more urgent need in most applications.
And porous Silicon always looked like a technology in search of an application (I though on chip chemical reactors would be a good one).
I'll note unless this story has been updated the title reads "super capacitors"
Of course we're a long way from an actual process for this. Still V 0.1
University press releases always over-hype these discoveries to get their stuff notices. After all the wolf crying, nobody expects them to be generating anything useful any more.
Where I call BS here is that the capacity of any caps, including supercaps, is dependent on area and "hiding" the capacitor inside a chips takes up space that would not otherwise be there (ie.. the chip would be far smaller if it didn't have the extra space needed for the caps).
Now it is also a given that chip construction is pretty darned hard. Different types of circuit work best with different construction and metalization . Analogue circuitry is best achieved on slightly different processing than digital or flash. Wen you pull these all together onto single chips (eg. single chip microcontrollers with analogue, digital and flash all on one chip, you end up making some compromises - particularly in terms of speed, fabrication cost and power consumption. This is a large part of the reason why larger devices for power sensitive applications tend to have different chips for flash, digital and analogue circuits.
Now add a different type of circuit (supercap) to the mix. Putting those on the same chip as the rest adds its own challenges and makes the rendering of the digital and whatever less efficient than it would be if it was just digital.
Sure silicon might make a great material for supercaps, but then putting these into supercap specific "chips" is probably the best way to get a good overall solution, as well as applying the solution to existing chipsets.
You're comparing apples with beehives. Microchips is hard to make cos you are using multiple layers to try and make very small components and the whole process generally involves a few dozen steps all of which can fuck up.
The process to make the capacitors is, by contrast, very simple with no requirements for anything that would be called tech - let alone high tech by todays standards. You could easily put the capacitors in place before you do any other processing thought I'd imagine most of the runs would be capacitor only ones.
I'm guessing they can get leakage pretty low - I'd got a mains radio in the shed that will play for a few seconds after I turn it on even when its not been plugged in for a month or so!
"the chip would be far smaller if it didn't have the extra space needed for the caps"
You are assuming that the space is "next to" rather than "above" or "below".
If I read the graph right, then the storage capacity of most of these things is about 5Wh per kg. i.e. 200kg are needed per kWh. So, to store enough leccy to power my house for one average day (about 20kWh) I'd need 4 tonnes of the things, which would occupy about 1.5 cubic metres. If I wanted say 4 days capacity for emergencies it's 16 tonnes and 6 cubic metres.
I can't see these being used for storage in the average house or flat, and I really can't see how they'd be used in grid storage other than for small amounts of short-term demand load balancing. Storing a few days worth of wind/solar/tidal is definitely out.
Have I completely misunderstood the numbers? (Ot's more than likely...)
These things are much better suited to buffering than storage. Batteries can store larger amounts of energy per unit volume or per unit mass, but have slower charge/discharge times and can stand fewer charging cycles.
Does that mean we'll finally be able to stop automatically attaching bypass caps to the power pins of any chip we use, since it'll be integrated as a tiny supercap directly on the die...? I could go for that...
Possibly; if it can deliver 5 amps in 300 psec, and hold Vcc drop to less than perhaps 0.2V, maybe (depending on the operating Vcc).
This is a classic EMC (NOT the SAN kind) design problem; keep Vcc variation and ground bounce low enough to keep from putting unfilterable EMI on I/O cables and interconnects..
a good use for out of date fab gear.
perhaps it could be used to keep a cpu from losing its state with unpredictable power outages..?
I am sure there are situations a UPS may not be possible...
Hmmm, based on that graph the average phone would weigh at least a kilogram - more than even the largest tablets.
I think I'll stick with batteries for the foreseeable future, thanks.
is that it's something you can incorporate into existing components or even as a brick or larger unit (power companies, DR,&c.). The top of every chip looks real good here, especially if you are building 3-D chip sandwiches. We are still at the kindergarten stage in materials engineering. No, make that 1st grade since we can at least read chemicals with all sorts of fine probes.
I wonder if we'll ever see, instead of a solid aluminum as the case material, replacing with this in quite a few layers and then a photovoltiac laptop/phone/tablet (and other times) surface that harvests completely across the bands. This is really getting fun!
Biting the hand that feeds IT © 1998–2017