Posts by af Horunge
53 posts • joined Wednesday 2nd November 2011 14:45 GMT
x86 vs POWER
This is very interesting. With Itanium and SPARC definitely gone, it's very likely that we will see a future server CPU market dominated by x86 and POWER. That has of course been in the making for a long time but now the picture seems to be getting clearer. I'm still not convinced that ARM has much to gain in the server market. The only real-world effect of the decentralized model that so many are touting as an advantage of the ARM ecosystem seems to be that chip manufacturers will compared to Intel have much more restricted access to fab capacity at smaller process nodes (witness Qualcomm's disaster with Krait availability). No one has actually been able to show me that ARM players can actually make server chips more cheaply than Intel can, and aside from cost, there is absolutely nothing that ARM manufacturers can offer in the server market.
Re: Alpha....
"Some may think older designs are archaic and not pretty, but they worked well." I agree, but that applies equally as much to x86 as to PA-RISC and Alpha. For some reason, a lot of people are extremely unwilling to accept that.
Re: Genuine question
"This is all assuming that intel can get their power consumption down to compete in ARM's market, and Samsung et al, think its wise to go with a cheaper intel product over a chip they can control." They already have. Try comparing a Motorola Razr M (ARM processor) with a Motorola Razr i (identical, except with an Atom SoC). You won't find any significant difference in performance or battery life. In fact, I own a Razr i and I get more than 2 days of battery life with light usage, whereas with my old Samsung Galaxy S I would be happy to get more than 1. As far as anecdotal evidence can go, I think that shows that Intel has reached a level where they definitely can compete with ARM phone and tablet SoCs.
Re: She tweeted "still in a bit of shock but excited".
Agreed, if you want to take that statement as her being "shocked" over Sinofsky's departure then apparently she is also "excited" about it. Which happens to be what I am, but it would be a strange thing for her to say (especially in public).
Just wait...
MSFT down 9.28% over the last 5 days. Not what I would want to see as a shareholder after the launch of the "greatest Windows ever". This will get ugly and Ballmer will soon follow Sinofsky.
Hahahahahahahahahahaha
I had no possible idea his demise would come this soon. I really didn't.
Well, HP, you're not getting any help from me.
2.7x the performance over Tukwila systems isn't very much to brag about... that still leaves Itanium half the per-socket performance of first-generation POWER7 (which also scales to 1024 cores, not 256).
Re: Microsoft desperate?
Ah. Well, at least I have the BusinessInsider article to be cheerful about. And the articles saying that pre-release adoption of Windows 8 appears to be five-fold lower than for Windows 7 at the same point in time (relative to its release in 2009).
Microsoft desperate?
I just noticed that retail Windows 8 Pro for pre-order sells for $69.99 (down from $199.99) at Amazon.com. For comparison, Windows 7 Pro sells for $264.28 and Windows 7 Ultimate for $279.95. Are Microsoft really getting desperate?
Also: http://www.businessinsider.com/microsoft-windows-8-sales-expectations-low-says-topeka-2012-10
Wow, so I guess you should have put some more effort into finding a replacement instead of just trying to ride on a flawed technology indefinitely.
Re: Smoke and Mirrors anyone?
What accelerators would those be that increase floating throughput (in any algorithm) by a factor of more than 1000? Are you sure you know what you're talking about right now?
I am guessing IBM made a typo and the POWER7+ LINPACK numbers are in MFLOPS, not GFLOPS.
Hahahahaha
That picture will live in computing history. My thoughts go to the MS BOB "living room" with the cat lying in a book case or something in that manner.
Re: SRAM vs eDRAM transistor density
Looks like I'm wrong - eDRAM apparently uses 1/3 the area of comparable amounts of SRAM. Not sure where I got that idea from, although POWER7's 1.2B transistors on a 567mm^2 die does add up to a very low density design even at 45nm (compared to POWER6 with 790m transistors in 341mm^2 at 65nm and Tukwila with 2B transistors in 698.75mm^2 at 65nm). I'm not sure what would account for this if the switch to eDRAM doesn't.
SRAM vs eDRAM transistor density
"Taylor said during his presentation that if IBM had stuck with SRAM-based L3 caches for the Power7+ design, it would have taken 5.4 billion transistors to etch the Power7+ chip – which would obviously have made it much larger than its 567 square millimeters." Isn't one of the trade-offs of eDRAM decreased transistor density? Poulson will for example pack 3.1B transistors in a relatively modest area of 544 mm^2. That means that some of the die size impact of the increased transistor count of using SRAM would be off-set by increased density - not that it would be a viable design option for a POWER7 derivative anyway of course.
In any case, great article. This could be a killer chip for IBM, and might even take some market share away from x86 in the form of PowerLinux. Can't wait for POWER8.
Re: Intel HAS been sprinting to process reduction faster than IBM...
First of all, I doubt that either processor is running near its turbo limit in the rate benchmarks (actually I don't think they are running with turbo at all). Second of all, if you had actually paid attention to what I have been writing, you would know that I have not stated that Sandy Bridge-EP is an equal or superior processor for an 8+-socket database server, nor that it is fair to make such a comparison between a processor that is brand new and one that is 2½ years old. I fully agree that POWER7 and Sandy Bridge-EP compete in different classes and that the valuable metric for the purpose of making a server purchase is not their per-core performance but their performance as complete systems. I have also said that POWER7+ is likely to be hands down, significantly faster than Sandy Bridge-EP and it will naturally be much closer in time of release.
The only thing that I have been contesting is the quote "RISC just CAN enable better/more single-cycle performance", and for that reason I have compared SPEC results and clock frequencies with equal amounts of cores (16 cores in this case) and reached the conclusion that POWER7 does not in fact do more work per clock cycle than Sandy Bridge-EP. The age of the processors in question and how far their system interfaces really scale etc. is not relevant, as we are not comparing systems but how fast their cores run and whether or not RISC vs CISC has any impact on their performance. Now if you disagree with that quote like I do, then we are pretty much in agreement. If you agree with that statement, then I have to seriously doubt how much you really understand about these matters. It's not anywhere near informed or correct territory.
Re: Intel HAS been sprinting to process reduction faster than IBM...
Well, even if you look at rate results with POWER7 systems and Sandy Bridge-EP systems with the same amount of cores, performance is still comparable (see attached links further below). There is definitely nothing to suggest that RISC gives POWER7 (again with substantially higher clock speed, 3.86GHz vs. 2.9GHz) "higher single clock cycle performance" than a comparable x86 challenger. In reality, POWER needs a higher clock frequency to compete with Sandy Bridge-EP (though I am not saying that its nominally RISC ISA makes POWER inefficient, I am saying that it's probably irrelevant). I don't care that POWER7's sweet spot is at more than 2 sockets, because the discussion we were having was not about systems performance, but core performance (where RISC vs. CISC could even imaginably be relevant).
And how exactly do AES acceleration and decimal floating point support come into play in SPEC benchmarks?
Links to SPEC_rate results:
POWER7:
http://www.spec.org/cpu2006/results/res2010q1/cpu2006-20100208-09586.html
http://www.spec.org/cpu2006/results/res2010q1/cpu2006-20100208-09582.html
Sandy Bridge-EP:
http://www.spec.org/cpu2006/results/res2012q1/cpu2006-20120305-19594.html
http://www.spec.org/cpu2006/results/res2012q1/cpu2006-20120305-19596.html
Buy your put options
101 days is ample time to generate enough FUD, badwill and rumors through word of mouth for this to be an instant flop. I'm going to bring this down like I brought down Vista (well, maybe it wasn't just me).
Posted in Micron mass-produces Phase Change Memory
Re: Some of you are too critical...
I don't see how this disrupts Fusion-IO's business model - they deal in advanced storage systems, not flash memory. If anything, this will probably go into Fusion-IO's products (replacing flash) as among the first things it goes into.
Re: Intel HAS been sprinting to process reduction faster than IBM...
I admit that SPEC ratings never make for a perfect comparison (and I think I did in the original post) but if you look at almost every individual test (whether base or optimized), Sandy Bridge is purely and simply faster. That is unlikely to be the result of just compiler tricks for every single benchmark.
I don't see how accelerators impact the comparison unfairly when you are, as in SPEC ratings, looking at exactly the same general purpose code for a large variety of different tests. If Sandy Bridge has some kind of accelerator that gives it an edge over POWER in general purpose code (I guess that would be AVX and compiler auto-vectorization), then it apparently does so across the board and that advantage would be translatable to many real-world applications. libquantum does look like it's completely broken by both IBM and Intel compilers, and that is why I suggest you look at individual tests.
I know that you in particular think that SPEC numbers are completely worthless, but a lot of other also very knowledgeable people (without a doubt more knowledgeable than me) disagree. You could look at rate benchmarks also and see that Sandy Bridge's performance carries over rather well. The reason I didn't link to them is that I think (though I might be wrong) that the differences in memory and disk subsystems (the POWER machines had twice the amount of RAM and an array of SSDs compared to just one HDD in the System x) would give POWER an unfair advantage in a throughput scenario.
I would agree that SAP and TPC benchmarks give a better idea of the performance of these systems for what they would actually be used for, but that was NOT the purpose of this discussion, rather if RISC gives POWER an inherent advantage over x86. In that particular case, I believe that SPEC is in fact a more valuable benchmark.
Re: how longs your road?
They have published roadmaps for the x86 line extending all the way through 2016, with Skymont as a die shrink of the Skylake microarchitecture (though they have not explicitly stated that they will go into Xeon processors, but following the current release schedule that means we will have Skymont-EP in 2017 and Skymont-EX in 2018). You have a point all the same however, and that is also the reason why IBM does not have to go into great detail about upcoming POWER processors whereas Oracle has to provide a clear and long roadmap for SPARC.
Here's a link to the latest x86 server roadmap by the way (although its authenticity is unclear): http://www.sweclockers.com/image/red/2011/07/27/1.png?t=paneBanner&k=0c324984
Re: Errrr - hang about...
POWER9 is in the roadmap published by The Register here: http://www.theregister.co.uk/2012/07/16/ibm_power7_plus_preview/page2.html
Can't really blame you for not knowing that though, since it was just two days ago that it came out.
Re: Errrr - hang about...
Well to be fair, we didn't get confirmation from IBM about anything beyond POWER8 until TPM's POWER7+ article just a few days ago, and even then I believe it was a leaked internal roadmap without any public announcement in tow. However, there are of course other reasons (most of all the internal documents from HP, which were released by Oracle) to have serious doubts about the future of Itanium, and more trust in the long-term commitment of IBM to the RISC/UNIX market.
What were the new parts?
I hate to whine, but what in this article was really new information (from the reference manual)? It looks almost like the article was cut in short, and the part that was supposed to come after the refresher is missing.
Posted in Micron mass-produces Phase Change Memory
Re: Is this a problem?
There will have to be the same wear leveling mechanisms in place as for flash. If anything, it's less of a problem since the number of sustainable write cycles (at least from what I've heard from other sources) increases much more than the write cycle time decreases.
Re: Intel HAS been sprinting to process reduction faster than IBM...
More current flowing through transistors equals faster switching speeds. And actually, the reason I used the word current was because that was the word you used in your post (the one I was responding to). Yes, you overclock a CPU by increasing the voltage, but increased voltage enables higher performance by increasing the amount of current. If this is the kind of discussion you want to have, then you're welcome to have it with yourself.
Also, SPEC numbers are hardly irrelevant (though they may not paint a full picture) when looking at the performance of two comparable processors, and if a 2.9 GHz "CISC" processor beats a 4GHz "RISC" processor in almost every test, then that renders your "RISC enables higher single cycle performance for IBM" comment ridiculous (especially since POWER7 is at every single point of comparison a more advanced processor than Sandy Bridge-EP). At no point did we even discuss SAP ratings, you just made that up. SAP scores will also place a greater emphasis on total system performance than SPEC ratings, which is not relevant in a RISC vs CISC debate.
By the way, I have no major doubts that POWER7+ on 32nm will blow Sandy Bridge-EP out of the water, especially for database workloads (as it really should be). But that will have nothing do with RISC vs CISC, rather with its having possibly 5GHz+ clock speeds and 80MB of L3 cache.
FINALLY Metro everywhere!!
"So you say you want Metro everywhere, all the time?"
Yes!!! That is exactly what I have been asking for all this time!! Why haven't you listened until now, Microsoft?
Re: Intel HAS been sprinting to process reduction faster than IBM...
I'm not sure what you're trying to argue. Sandy Bridge for example came with very significant improvements to performance irrespective of the process it was manufactured on (in fact it was manufactured on the same 32nm process as its predecessor, Westmere). The fact is that Sandy Bridge-EP has performance on par with the much more expensive and advanced POWER7 while sharing motherboard, chipset etc. with workstation/enthusiast systems and its core microarchitecture with consumer products that go into cheap desktops and laptops. That is the result of brilliant R&D and engineering at Intel for many years now, not of a single-minded focus on fast die shrinks. If that was the case, Sandy Bridge-EP on 32nm would not be significantly faster than Westmere-EP on 32nm.
And yes, increased current does boost transistor performance. If you didn't know that, I'm not sure what you're even doing on these forums. That "RISC just CAN enable better/more single-cycle performance. IBM is clearly getting benefit from that." when a 2.9GHz Sandy Bridge-EP (E5-2690) offers comparable or better performance than a ~4GHz POWER7 processor (see attached SPEC numbers) is yet another completely bizarre statement. I think your rhetoric is better suited for a time when a 600MHz Alpha was actually faster than a 1GHz Pentium III, but those days are long gone.
POWER7:
http://www.spec.org/cpu2006/results/res2010q2/cpu2006-20100426-10753.html
http://www.spec.org/cpu2006/results/res2010q2/cpu2006-20100426-10752.html
Sandy Bridge-EP:
http://www.spec.org/cpu2006/results/res2012q1/cpu2006-20120305-19593.html
http://www.spec.org/cpu2006/results/res2012q1/cpu2006-20120305-19595.html
Re: Intel HAS been sprinting to process reduction faster than IBM...
That's just a load of bull (please excuse me). POWER on 45nm manages to be faster (or at least just as fast as) than x86 on 32nm because it has a vastly higher power budget and goes into much more advanced packaging and systems with better integration. RISC vs CISC is completely irrelevant, and in fact, POWER is probably one of the least orthodox RISC implementations there are.
And if anyone is going for GHz at this juncture, it's IBM with 5GHz+ z/Arch processors and possibly 5GHz+ POWER processors at 32nm. It serves them well with regard to single-threaded performance and probably most of all for latency-sensitive applications, but power consumption shoots through the roof. Intel can't do the same trade-off at ~130W TDP.
Re: Benchmarks ??
POWER7 absolutely crushes Itanium and SPARC already, in about every metric. x86 is actually at par performance-wise with Westmere-EX and Sandy Bridge-EP, although RAS features still have some way to go.
Re: Yes, hardware/physical RNG
Is that similar (in capability) to the RNG that Intel implemented in Ivy Bridge?
Re: what i dont understand....
*whistles X-Files theme*
Meego + ACL is the way to
I have always said (well for a year or two at least) that MeeGo + support for Android apps (whether officially or inofficially supported by Nokia) is the best option for Nokia at this time. And I believe so more than ever. Leaving the Intel partnership was also a mistake at the hardware side, with every indication that Intel's Atom processors will overturn ARM competitors in performance/watt either as soon as at 22nm (2013) or at 14nm (2014). That could have provided Nokia with differentiation at the SoC level.
I do not count among those who think that Android would be a good option for Nokia. But Windows Phone is clearly a disaster.
What commie iron?
Ehm... what (mainland) Chinese hardware could they even have chosen, really? I am not aware of any "homegrown" PRC HPC systems. A commodity Intel CPU + Nvidia GPU cluster taped together with a Chinese interconnect is not exactly a homegrown Chinese supercomputer in the same way that a Fujitsu CPU + Fujitsu interconnect system is a homegrown Japanese system. Getting one of those hybrid systems from the PRC when they could easily make one themselves or get it from any other industrial nation seems like a slightly far-fetched (and dumb) idea.
Paris Hilton because she seems about as relevant to this Taiwanese supercomputer deal as any imaginary Red Chinese HPC contenders.
Re: That's not what HTTPS is for
That's a valid point, but taking screenshots of secure websites is still a slip-up.
Re: It all sounded so promising....
I would say that LCD still has a long way to go before matching CRT in many respects. OLED and FED/SED are both superior technologies, unfortunately both have had problems in scale-up to make large displays that are active for long stretches of time. As far as I know, the trouble of making the organic materials (especially those of the blue subpixels) last long enough has been the primary issue hindering OLED mass production.
Kind of bitter-sweet
Well it's about time. I just wish that FED/SED could be available as an option as well.
Does anyone know how they have solved the problem of color imbalance related to the shorter life span of blue subpixels?
Re: The future is bright!
The CPUs were American-made, the GPUs were American-made; the operating system, file system and job scheduler are off-the-shelf open source software. So how exactly was Tianhe-I Chinese innovation?
Compare that with the K computer, in which every single significant hardware component (and some of the software stack) was developed in Japan.
Re: Just seems like a not very good idea
Please explain how Intel can make No. 150 in the Top500 with an MIC test system (that provides 1176 MFLOPs/W) if x86 co-processors are a fundamentally bad idea.
Maybe - please just consider the possiblity - it's the "RISC elegancy" crowd, that has been dealt blows and setbacks time and time again over the last 15-20 years, who are wrong and not the victims of a vast anti-RISC Intel + MS (and possibly IBM, NWO etc.) conspiracy.
Are you serious? What CPU + massively parallel compute platform exactly does AMD offer that matches Intel Xeon + MIC or even Xeon + Nvidia Tesla? Powerpoint slides about a "heterogenous system architecture" that will fuse together x86 and GPU ISAs somewhere down the road (coupled with AMD's past performance of delivery on roadmaps) don't impress me.
Pipeline goes *where*?
I'm not going anywhere with IBM after that night we renegotiated the support contract...
Posted in HP still NOT porting HP-UX to x86?
As if HP's roadmaps could get any more confusing, then this article appears. No fault of the author though, excellent write-up.
MSFT
Sell, sell, sell....
Re: Not unprecedented
Remember when everything was going to be coded in .NET (and then Silverlight)?
Thinking that Windows 8 will make a large number of users leave Windows for Linux (or even Mac OS X) is just as insane as Microsoft apparently expecting Windows 8 to be a commercial success. What will happen is that even more people will stay on Windows 7 than who stayed on Windows XP, and in a couple of years Microsoft will announce that Windows 8 was intended as a "tablet-only" release for "testing the waters and building innovation" and whatever, and then Windows 9 will be a normal Windows release and a partial backtrack just like Windows 7.
Re: Wow, HP realy are slinging there own mud about
Don't you mean second time? (As far as I know HP-UX started out on PA-RISC and then went directly to Itanium.) While if OpenVMS would be ported to x86 it would be the third time.
