RE: Matt Bryant
".....Huh? You didnt understand anything I wrote, did you?...." Let's see, looking back at what you wrote.... Yeah, I did, it's just I saw it for the complete Sunshine it was.
"....SUNs Niagara design ALLOWS a small cache...." Lol, that's like saying a Yugo ALLOWS a smaller engine compared to a Porsche. It's not that the design allows a small cache, it's that the design forces a small cache for two reasons - one, it is supposed to be a cheap design to fight x64, so Sun can't afford to put too much cache on it; and two, it would not be possible for Sun to provide enough cache for all the cores as there is not enough space on the die, and to make it larger would make it both hotter and much more pricey. Sun CHOSE to make the design with small cache as they always thought they would have Rock to take on Power and Itanium.
"....You must devote many transistors to these two things. Transistors that can be better spent elsewhere....." Yes, like in real cores. The problem for your little bit of fantasy is that Nehalem has proper cores and much more cache at a lower price, and Power and Itanium manage to include real cores with much larger register counts because they are full-scale enterprise designs, not cheap alternatives.
".....Ive told you that you do NOT want to spend all these transistors on enormous caches and prefetch logic....." Well, you don't if you're Sun and you're desperately trying to fight off Xeon. Of course, Power and Itanium weren't designed to fight Xeon but each other, and they do so with no holds barred. They have large transistor counts becasue they have larger register counts, fatter pipeslines and properly implemented technologies such as cache prediction, whereas T2/T2+ has always been a compromise to meet a pricepoint in a lower league. If that wasn't true then Sun would never had felt the need to design Rock or use Fujitsu's SPARC64 chips.
"....The less transistors, the less heat and the less complex the chip will be....." And the less it will be able to do. You can't have it both ways. By making T2/T2+ with such simple cores and so little cache, Sun made a chip that was never going to be competitive in anything other than webserving.
"....This translates to easier to manufacture, easier to debug, higher quality, better yield, etc etc etc....." Oh yeah, that worked out so well for you on Rock, which also had a simplified RISC core design, though not quite as crippled as T2/T2+. And the new and higher-clocked T2/T2+ parts are suspected of just being from deep sorts of the bins, which means they are zero innovation.
"....And then you make remarks as "HAHAHAHAHA!!, Niagara doesnt have a big cache and no complex prefetch logic! HAHAHAHAHA!!!"....." Did I post "HAHAHAHAHA"? Nope, must be that imagination of yours. It seems quite fertile, if a little unoriginal.
"...I suggest you should study more...." Sorry, too busy doing real enterprise work, which included doing comparative benching of Niagara against Xeon. I'm guessing the only benching you do would be in a park.
"....I have double M Sc degree, one in math, the other in comp sci..." Which just goes to show that education is no protection agaist the idiocy of the Sunshine. Did you also brag about your qualifications earlier this year when you were no doubt telling everyone that Sun wasn't up for sale, that Rock was a sure-fire success, etc, etc? I'm not going to list qualifications or even where I studied, as it would be rather crass, but let's just say you're not winning in that area either.
".....You should learn a bit more about computer architectures before making such ignorant remarks?..." Ah, the old Sunshiner standard - "if you don't agree with me it must be because you are ignorant and stupid". Well, it looks like the majority of the market are just as stooooooopid, 'cos we aren't buying Sun. Does it frustrate you that you are just so gosh-darn smart but all the stupid little people don't listen to you?
"....As I told you, the CPUs has been faster and faster, whereas the RAM has not evolved in the same way....." Of course! That old EDO RAM in my loft is just as fast as DDR3, how stupid of me to spend all that money buying DDR3! I'm so glad there is someone as clever as you to set me straight. Now, if only we could get you to work on World peace.....
"....The only way the fast CPU could avoid cache misses is if the CPU had Extrasensory Perception and Psychic powers to predict the next data to fetch in advance...." Well, here in reality we use cache algorithms. You may want to take some time of from your next MSc to do a little reading about algorithms such as least frequently used, adaptive replacement, or multi-queue caching. You'll find there is no ESP required, but it may require you to take a step out of your fantasyland.
"....And if you persist stating a fast CPU has fewer cache misses than a slow CPU, then I require a proof from you. Show me papers supporting your false statement...." Did I say that? Even if I did, how do you prove the statement is false? You didn't. Did you post any links to paper supporting your waffle? No. And you "require" proof from me? What are you, my teacher? Looks like your studying missed out a big section of basic comprehension as well as basic manners. But let's just think about your statement, using that logic you are so hot on. The point I mentioned is that Itanium, Nehalem and Power have MORE cache than T2/T2+, not that they are faster clock speeds. The logical conclusion would be that you want to drag the conversation away from this fact by a brash assertion that I am "lying" about something completely different. Either that or you're just an idiot talking through your rectum.
"....A large cache is something you want to avoid. It is not a good thing....." OK, you can't seriously expect anyone to swallow that massive lump of male bovine manure! If your requirement is performance, then the larger the cache the better! But then I'm guessing you only want to consider such factors as power consumption, where the T2/T2+ is superior. The reality is companies will pay to get performance, even if it is power-hungry, because they really need it for those enterprise applications.
"....The Niagara has small cache, and still it outperforms Power6 at 5GHz....." In what way does it outperform it? On what test, using what application, to fit which business requirement? My own experience is that Niagara has zero chance of outperfroming Power6 in any of our business uses, except webserving. And even then we use x64 for webserving as it is easier, more flexible and far cheaper.
"....If the things you write were true about the Niagara beeing inferior to Power6, how come the Power6 bites the dust by a large margin in the benches? You should apply some logic on your statements first. It helps a lot." You really can't be so stupid as to believe that one carefully crafted bench makes Niagara faster than Power6! I'm sure if I called Armonk they'd supply me with a dozen equally carefully crafted bench sessions showing Power6 walking all over Niagara. The fact is neither has any bearing on my actual business requirements, and that's even after admiting we use Oracle and Siebel. I have benchmarked Niagara, using our apps in our environment, with Sun providing the tuning, and it provided miserable Oracle performance when we compared it to Power5/6, "Montecito" Itanium, "Barcelona" Opteron and "Tigerton" Xeon. You can squeal accusations and your beliefs all you like, I've seen the reality, and my logic is that what I have touched and seen far outweighs what you are daydreaming of in Sunshinerville.
/SP&L