It's a poor sort of memory that only works one way
By which I mean sticking with the one-dimensional layout. As you up the number of cores and (as they're doing here) introducing more speculative pre-fetching on either side of a branch you're putting more and more strain on the memory bandwidth. It's all well and good scaling your compute cores up to 12, but the memory bandwidth just isn't keeping pace. Wouldn't it make more sense to look at going to 2-d or some other architecture (maybe even use a projective plane like the Fano plane and let apps build custom topologies on top of it)? Even the PS3 had two ring-shaped memory buses (though main memory itself wasn't laid out like that), so it's not beyond the realm of possibility to get novel memory buses in consumer/general purpose machines.
Maybe this is something we can expect to come along eventually thanks to the SeaMicro purchase? Or is that purely for inter-system connections?