Oracle's Sparc T4 chip: Will you pay Larry's premium?

Anonymous Coward

T3 and L3 cache, crypto unit algorithm support

"The Sparc T3 chip, by contrast, did not have an L3 cache at all, either on or off the chip, and this no doubt affected its performance detrimentally."

So, you're saying that 4MB of L3 (shared, plus 128kB*8 of L2, not shared) must necessarily beat 6MB of L2 cache (all shared)? Could you perhaps explain your thinking here?

Oh, and a nitpick: Only the first four algorithms mentioned in relation to the crypto unit are in fact ciphers. CRC32c is a checksum and not "encryption". The next four are cryptographic hashes and the last three are specialised instructions to speed up parts of certain algorithms, but are not themselves "encryption" either. Of course, this horribly buggers up the flow of a cheesy write-up, but as a tech reporter I do think you can be expected to understand the difference and come up with cheesy write-ups that retain correctness.

Explaining just why that crypto unit is a big deal for databases would be useful for those of us who aren't big enterprise datamongers. I can guess, but can you explain?

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