Cache is king!
"According to the ISSCC abstract, Intel will be showing off a "12-wide issue" Itanium chip with eight multi-threaded cores that has a ring-based system interface and a combined cache on the die of 50 GB. That's a weird number, with the Itanium 9300 having 512 KB of L2 instruction cache, 256 GB of L2 data cache, and 6 MB of L3 cache per core. Just keeping all of those cache sizes the same and ramping up to eight cores puts you at 54 GB."
How much cache?? MB I think, not GB...
Paris cos I'm sure she's given a few bites..