TEM?
maybe high speed stepping of position or multiple beam X-ray or Electrons or UV lasers?
Adding 3D NAND layers is butting up against aspect ratio limitations in the chip production process, which will limit the number of layers. String stacking is a technology that could provide an escape from this aspect ratio trap. Samsung is shipping 48-layer 3D NAND, its third generation product; that’s the equivalent of 48 …
Nobody has so far managed to build systems with enough parallel but independant X-ray or electron beams to provide enough production speed for the process to be viable. Keep in mind the average throughput for system like this is well over 80 wafers per hour per cell. More often it goes over 150. The average DUV litho system runs at 250 wafers per hour per machine.
Would that not make this 4D NAND?
I mean, not in reality, as the strings are still functionally at 90* to the bitlines and wordlines; but if the addressing is Die, Layer, Word, Bit that could be described (and marketed as) 4D Flash Memory.
Of course if they do figure out how to make the strings 90* to the TSV, bitlines, and wordlines to make true 4D NAND, well.. that would just be awesome.
Because doing semicon production is really, really hard and requires MASSIVE investment that needs to be paid back? (And doing more die stacking means tying up more of those expensive machines for longer to produce a single product, hence an increase in price)
Seriously, a single DUV photo litho machine goes upwards of 10 million euros. Then you need wafer production, dicing, slicing, spincoaters, PVD, CVD, implanters, etchers, etc, etc. Things add up. Fast.