TSV dimensions
"as the length of a TSV to link base and layer 3 is not that much different from one linking the base to layer 4..."
Whilst I don't imagine that nice artistic impression of the device is entirely accurate, one point of interest about it is that it shows all of the TSVs as stretching from base layer right through to the top layer. And if controlling the TSV length really is that big a challenge with the current manufacturing processes, then that's exactly how I'd plan to build these devices (no different to designing multilayer PCBs taking into account the capabilities of your preferred board manufacturers to deal with blind/buried vias). Forget about trying to save silicon area on the higher layers by using partial-height TSVs up to the lower layers, just whack them all through all the layers on the device and reduce the risk of having to junk the entire device.