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and maybe the question too!
Upstart RISC processor and coprocessor designer Adapteva is shipping the first of its Parallella system boards, which its Epiphany multicore processors with ARM processors to create a spunky and reasonably peppy hybrid compute engine that doesn't cost much and is very energy efficient for certain kinds of processing. It is not …
Why a bastard to program? Not really any harder than any other parallel setup.
The compiler and IDE - its based on eclipse - seems to be fine.
I'm surprised you are surprised how slow it is and then notice the power consumption. The price will be a big consideration too - when they get to 7nm I would imagine no-one will be buying new GPU cards (unless they're Adaptiva based) so long as your current card can cope with the output from the epiphany cluster.
I can imagine a lot of OpenGL games coming out too - licensing costs will be zero which will make a difference.
And HTML5 games too.....
I have been wondering when these new breed of micro computing devices will get powerful enough to be used for high resolution, high framerate video capture.
There isn't a product on the market around the £100 mark that will let you capture 1200p video and real-time encode it to H264, I would even be happy with a downscale to 720p or 1080p - but all the products available framerate-limit and/or res-limit your main monitor.
PC Gamers would buy these by the bucketload if something like this could be turned to such a purpose.
Thanks. I'd been watching for developments in this product and I think this shows that they are definitely on the right track.
I was very interested to read in the article that the Epiphany cores have "a mere 35 instructions". I'd never read that before, so I went and found a link to the architectural reference document. Quite surprised to see that the cores don't have any division instruction (integer or float). But then, I guess ARM has been getting along quite well with only spotty support for hardware division instructions, and I'm sure that working around this restriction is the bread and butter work of the sort of people who write gcc or llvm (who both seem to be on board in supporting Parallella).
Despite having zero use (at the moment) for a cluster like this, I'm seriously tempted to put in an order. Even without a hardware division (or inverse) instruction, I'm sure there are still lots of interesting applications that would run well on this. The clustering side of things looks very interesting, too, given the huge interconnect bandwidth and memory architecture.