back to article Cloud on a chip: Sometimes the best hypervisor is none at all  

We have come a long way, from data processing to systems to servers, and maybe so far we are essentially getting back to where we started. Centralized systems begat distributed servers, and now we are in the middle of begetting a hybrid kind of computing that looks like distributed iron but, thanks to virtualization and …

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  1. Stephen Booth

    Going to change the game

    This might be the only easy way that the industry can continue to deliver the moores law performance increase that the market expects.

    People have started to notice that adding cores without doing something about the memory system is only giving a modest improvement in many cases.

    I think the memory is going to HAVE to be stacked directly on top of the chip. We have already reached the point where there are not enough conventional chip pins to feed the cores.

    So the big processor manufactures will be producing single devices that contain all the major components of a server, cpu, memory, 1st level network, and flash storage. Turing these devices into servers is going to become a very low margin operation with very little differentiation between box builders. Good for anyone making processors, bad for people futher down the food chain.

  2. Mage Silver badge

    SCC

    It's called an ARM SoC

    Samsung SC6400 had stacked RAM, Flash, ARM SoC in one BGA module over 3 years ago.

    Transputer was the original idea. Make each computing element have it's own local RAM (with no controller or bus interface needed and 4 x high Speed communication links.

    The Transputer died because of Thorn, Thatcher and being British.

    I'm sure Ivor Catt wrote about this idea before 1980!

  3. A Non e-mouse Silver badge

    Transputer, anyone ?

    This sounds strikingly similar to the Transputer http://en.wikipedia.org/wiki/Transputer

  4. Mr Q
    Megaphone

    Ahhh Hello - Tilera Tile64/TileGx

    Naughty, Naughty, do your research author, Tilera already offer/sell mesh SOC computing with 64 and 100 tiles (cores) per chip, and have been doing this for years. There chips can also run multiple SMP Linux, one per tile. I'm surprised you failed to mention this in your article.

    http://www.tilera.com

  5. John Sanders
    Linux

    This is a race...

    The first one to build a computer made of complete x86 computers of the shelf wins!

    You heard it from Sanders first!

    Think about it carefully and you'll realize what I mean.

  6. John Savard

    Wheel of Reincarnation

    @John Sanders:

    As we all remember Beowulf, I suspect your point is that we're going from the faster core to SMP and now to something similar to a Beowulf cluster, so while there is progress in the number of gates per chip, we are going around in circles architecturally.

    @Stephen Booth:

    Even before they get the technology to stack the memory on the chip, they could start by having just one core, and using the rest of the chip for memory. Implemented as fast static RAM, but still memory instead of cache, so as to save overhead. With a wide data path. External DRAM could be treated as an I/O device.

  7. RoyE

    Physics meets finance and other jokes

    About 1yr old & very funny, IBM’s chief comedian on the same topic

    http://videos.dac.com/47th/meyerson/meyerson.html

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