ARM vendor Cavium has revealed 48-core silicon it reckons will pitch it into high-end data centre and server apps. Cavium has hired Larry Wikelius, co-founder of failed ARM server silicon vendor Calxeda, and his former colleague Gopal Hegde (who played a part in creating Cisco's UCS servers). Both are insistent that now is the …
You say, 96 cores under 200W energy budget total and with coherent cache access, running at 2.5Ghz? That's interesting.
Re: two sockets?
Re: two sockets?
just to be difficult I'd like thirteen sockets please
I would still prefer a dual socket, 12 core Xeon anyday.
WAY more powerful, and electric power/compute power, I guess the Xeon wins..
Re: " I guess the Xeon wins.."
Assuming you want to run Windows in a box from Dell, HP, etc.
Otherwise: well, just look around you.
For my workloads, 8x parallel power wins over not-so-much faster CPU. Especially since the worst performance penalty is not in CPU, but in DRAM latency.
OK, that's exciting
I have no idea what I would do with it, but It is quite something.
MBA interference ?
Exciting yes, but what is it with the product range? Why do they need to have 4 different variants for different workloads ? This looks like typical MBA-driven attempt at market segmentation. I know the theory, but I am not sure it will fly with Cloud vendors. They will already be upset about multiplying by two the number of server types they offer (an x64 range and an ARM64 range) but asking them to carry four different ARM 64 ranges is madness.
In-order cores will limit usefulness for enterprise and cloud
Are the Cavium cores in-order like the cores in their MIPS parts? The large core count strongly suggests that this is the case, and we should be prepared to be disappointed with the per-thread performance.. which dramatically limits the applicability to enterprise and cloud workloads. Having sampled various ARM servers, I can tell you vendors have historically misunderstood the software requirements, concentrating on ticking off various stacks with NO understanding of performance and requirements on performance to enable scale out.
I want one
No, make that two; Yup Two dual socket machines stuffed to the gills with that sweet sweet DDR3/4
Performance isn't everything, neither is the end-user
Some vendors want to compile their own linux based software and NOT have it work on anything except the kit they sell.
Often, Xeons are over-spec'ed for the required work (Checkpoint and F5 sell kit with desktop CPUs) and ARM can help obscure what's really going on and paint the product green.
Checkpoint already have an ARM plugin board which is supposed to improve performance. It allows them to scale performance in one area without providing an appliance which is more capable in general.
I despise the practice, but that doesn't mean that it doesn't happen.
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