Big Blue bade farewell to a bottleneck in data transfer this week with a new analog-to-digital converter capable of up to 180 billion conversions per second, and claimed success in mass producing an earlier design, as well. This double whammy of news was revealed at the International Solid-State Circuits Conference (ISSCC) in …
" ...capable of 64GS/s (giga-samples per second), and is capable of generating a whopping 128 billion analog-to-digital conversions per second ..."
(I assume 128 billion is 128G) Does this mean that the input sample and hold circuitry is the limiting factor in overall capability? If so, could they use two input circuits in parallel and interleave the outputs feed to the SAR? I find all this puzzling because a SAR uses a D/A convertor as part of its feedback/comparison loop and that would be most likely to be the limiting factor for speed.
Just imagine the BitCoin mining rig you could
Make with a couple of these! ;-d
"667 milliwatts" (2/3 of a watt) in "0.45mm square" (0.45x0.45 = 0.2025 square mm) seems quite a ferocious power density to me. Near incandescent in fact.
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