Re: Emulation or Simulation?
Emulation, actually we are talking about simulation here as the firmware in the Intel chip is untouched and all of the work is done by x86 instructions not firmware instructions, is much simpler for the base S360 (little changed since the 1960's) architecture.
MCP runs natively on 48bit word machines with hardware typing per word, S360 is 32bit untyped. This means it's perfectly acceptable to do integer instructions on character strings on a S360 machine and impossible to do so on the MCP machine. So there must be a "type byte" per word holding the typing info referenced by the execution simulation for each instruction.
The Univac case is a bit more complicated as the base architecture is IBM 7000 series (the one that preceded S360) and uses 36bit words and, interestingly, 1's complement binary arithmetic. That's the one that has two representations for zero (plus and minus).
Both of these represent considerable barriers to fast simulation since there is a mis-match at the fundamental storage architecture. I've looked but been unable to find any papers on how these problems were overcome.
S360/370/Z all share the same base storage architecture, 32bit words, two's compliment arithmetic, which is shared with the x86 family as well. I'd be very surprised if a simulation of S360 was not considerably quicker than either of the Unisys architectures.