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back to article IBM to double-stuff sockets with power-packed Power7+

Power Systems users, start your engines. Or, more precisely, start your budgeting cycle so you can get ready for Big Blue's impending Power7+ RISC processors to run your AIX, Linux on Power, and IBM i (formerly known as OS/400) workloads. At the Hot Chips conference this week in Silicon Gulch, Scott Taylor – one of the chip …

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Anonymous Coward

SRAM vs eDRAM transistor density

"Taylor said during his presentation that if IBM had stuck with SRAM-based L3 caches for the Power7+ design, it would have taken 5.4 billion transistors to etch the Power7+ chip – which would obviously have made it much larger than its 567 square millimeters." Isn't one of the trade-offs of eDRAM decreased transistor density? Poulson will for example pack 3.1B transistors in a relatively modest area of 544 mm^2. That means that some of the die size impact of the increased transistor count of using SRAM would be off-set by increased density - not that it would be a viable design option for a POWER7 derivative anyway of course.

In any case, great article. This could be a killer chip for IBM, and might even take some market share away from x86 in the form of PowerLinux. Can't wait for POWER8.

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Black Helicopters

Re: SRAM vs eDRAM transistor density

Looks like I'm wrong - eDRAM apparently uses 1/3 the area of comparable amounts of SRAM. Not sure where I got that idea from, although POWER7's 1.2B transistors on a 567mm^2 die does add up to a very low density design even at 45nm (compared to POWER6 with 790m transistors in 341mm^2 at 65nm and Tukwila with 2B transistors in 698.75mm^2 at 65nm). I'm not sure what would account for this if the switch to eDRAM doesn't.

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kit

Re: SRAM vs eDRAM transistor density

The different between Sram vs eDram , is every funtioning Sram cell consists of 6 transistors while eDram has only 2.

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Bronze badge

Dense

"Somewhat slower but a lot less dense" should have been "...but a lot more dense" as one packs more bits of memory into the same die area.

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Bronze badge

In a database context...

With our main application, the processor GHz mattered very little. The underlying binaries simply had such a diverse memory-reference-pattern that the processors were 'starved' much of the time. We also ran into the software's inherent multiprocessing limits at about 28 cores (+SMT).

Power 7+ sounds like good news because the larger caches mean less 'starving' and more access to the modestly-better GHz. There wasn't a lot in here about speeding up I/O. IBM usually looks to differentiate Power with enhanced I/O structure, too.

A somewhat indulgent style from the author, but good data research for easy comprehension. Thanks.

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Anonymous Coward

Well...

this is certainly the best OLTP chip on the planet. It one ups x86 in performance with that massive cache and Power has always been the RAS gold standard. Power should own the Unix market. The question will be if this is good enough to entice some x86 workload up to Power AIX or Linux.

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Thumb Up

Have to say...

It's good to see The Register still publishes actual well written articles from time to time, instead of just quick mash of opinion pieces and "lets get some hits by slandering X company" trash.

Also nice to hear what's up in the Power front.

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Anonymous Coward

My word I wan't one

Just why the hell do they have to be darned expensive!

live databases over a job lot of x86_64s is getting less than fun.

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Anonymous Coward

Re: My word I wan't one

So there's several schools of thoughts there (and agree.. partitioning the database and spreading it over lots of x86 systems is a nightmare.. you have my sympathy).

1/ Check.. they're actually not as expensive as perceived. eg. IBM 3750 M4 (8722-D2U) web price of $151K for a 4-socket 2.7GHz (32c/64t) Sandybridge EP with a smattering of 384G DRAM. A Power7 740 (3.7GHz) 12-core 48GB RAM is listing on IBM's web site for $37K. Now where did you get the data from that it was so expensive? Seems to me that Power has better price/performance with higher RAS and one throat to choke, not to mention a ton of extremely tuned and optimized applications that are exploiting the POWER design. People still do care about performant applications these days, yes? Ah.. and built-in virtualization by design is quite nice (vs. buying Intel's kit and THEN going and selling your blood/sperm/body parts to VMWare, and then DIY Cloud).

2/ When you go shopping for a high performance vehicle... do you start at a Toyota dealership? :) No, you head straight for a boutique manufacturer.

I for one love the reliability and support for the POWER systems. Thanks for the article Tim. oh, and I think the NCU is a non-Cachable Unit. I googled "IBM POWER NCU" and it looks like it's something IBM brought out in the Cell chip and there's some references in the Power4 tuning redbook. Not that that info helps.. still have no idea what it does.

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