back to article Tokyo U gets second FX10 Sparc supercomputer

The University of Tokyo has gone back to Fujitsu for a second helping of K supercomputer. The Institute for Solid State Physics is looking forward to next spring, when Fujitsu will fire up a PrimeHPC FX10 supercomputer that will be used to conduct materials research in high-performance solid state devices. The supercomputer …

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  1. Hieronymus Howerd

    In a few years' time

    we'll be wistfully looking at our phones saying "I remember back in the 2010s when a computer this powerful took up a whole room! Why, two of them was thought to be enough for a whole university!"

  2. asdf
    FAIL

    wow Larry will be pleased

    Nobody has used the word fast and super (except slow) in the same sentence as SPARC in a very long time. Now back in the real world if only they didn't cost 10x as much as x86_64 for half the performance or less.

  3. Tim Parker

    @asdf

    "Nobody has used the word fast and super (except slow) in the same sentence as SPARC in a very long time. Now back in the real world if only they didn't cost 10x as much as x86_64 for half the performance or less."

    Wow... where to start...

    The (real) ULTRASparc descended chips in the Fujitsu box are not really anything to do with the current Oracle line of SPARCs of Niagara lineage - completely different in structure and intended use - fat and narrow(ish) for number crunching amongst other things vs. thin and wide for lots of light threads such as web-loads. They shared the same ISA (v9) initially but differed in many ways, especially in the floating point units where the original T1 got it's reputation for poor FP performance (but that was largely missing the point anyway). Horses for courses and all that.

    People also use machines like this for reasons like high reliability, high availability, easy of hot-maintainance - as well as useful performance. There many reasons to choose something bespoke as well - rather than lashing together a bunch of x86_64 boxes... and if you think the bulk of the expense of HPC layouts are due to the chips, then you're much mistaken. Hell, if you even think a half-decent x86_64 workstation with decent support is cheap, you're in La-La Land.

    In short, if you trying to slag off a Fujitsu super-computer because a old T1 workstation was expensive compared to BestBuys finest at the time, and shit at running Crysis, then you're way off - if not, please explain what exactly you think is the issue.

    1. asdf
      FAIL

      Re: @asdf

      No I slag off on SPARC because the vast majority of shops that have them, have them as legacy only with a very advanced plan to migrate off SPARC if they haven't already. Its been a decade since I was in a shop where developers were excited to have their code run on a SPARC box as opposed to complaining how dog slow it is and how it gets in the way of them getting their work done.

      1. Tim Parker
        WTF?

        Re: @asdf

        "No I slag off on SPARC because the vast majority of shops that have them, have them as legacy only"

        OK - so basically nothing to do with current SPARC chips, and nothing to do with HPC.

        1. asdf

          Re: @asdf

          >current SPARC chips,

          They could completely rock and it wouldn't matter much. That ship has sailed. The only reason this story exists is because the Japanese government are incapable of going out to bid to a non Japanese non local anything. Its not because of any price or technical merits of SPARC.

          1. GoingGoingGone
            Happy

            Re: @asdf

            They could completely *rock* and it wouldn't matter much.

            Ah, the irony!

  4. Anonymous Coward
    Anonymous Coward

    reputation for poor FP performance

    (but that was largely missing the point anyway).

    My, that would be very poor FP performance altogether (*winks*).

    Getting back to x86 vs SPARC or similar, I would much rather be developing code on anything but x86. Anything without a large register file, orthogonal instruction set and proper SIMD support (not the various kludges that are SSE) is a pain to program, IMO.

  5. Anonymous Coward
    Anonymous Coward

    Déjà vu?

    This article looks like it has been copy/pasted from two others on the subject, with inadequate effort made to avoid repetition.

  6. MrT

    Muster the Lustre cluster...

    ...we've semiconductor conduction tests to conduct..."

    Just an ElReg tagline wannabe. Sorry, the mobile website won't let me pick the "I'll get me coat" icon.

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