Toshiba is replacing its current 32nm process flash chips with 24nm SmartNAND: flash with on-chip error correction. The new chips will have faster controllers and deliver faster read and write speeds, although no numbers have been supplied. They will come in five capacity points, doubling up from 4GB to reach 64GB, and feature …
>feature on-board ECC (error correction and control) logic. That will obviate the need for the host system to run ECC functions on its flash storage.
Won't this also have the effect that the host system will never know errors take place?