"This technology sounds ideal for cheap electronics, rather than high performance electronics"
Yes and no.
The lack of high performance is very likely. IIRC all the flexible electronics approaches have fairly unimpressive (by modern standards) clock speeds. 100KHz definite, I *think* some could (or were talking) up to 5MHz.
The 2 obvious ways to counter that would be to ditch the clock and go asynchronous and/or to stack multiple logic layers one over the other and use the third dimension. This was looked at back in the day for wafer scale logic (Hughes were big in airborne processors). Interconnect methods exist for Silicon but not so sure about floppier substrates. The architecture was also described for imaging sensors using multiple layers of CCD electronics (analogue processing) Programming would have been done by switching different logic blcks into the processing chain and varying their individual clocks, possibly with nearest neighbour I/O. Processing clock rate <1Mhz but all pixels done *together*.
You might like to think about some other applications of this.
"Cheap" is more doubtful. It's what this article did not say. What are the device sizes? magazine publishing does 4 layer registration at IIRC 1200DPI. Roughly 21microns. PCB layouts do about 70microns. Magazine production is relevant because big production -> small cost, which you want if you want to talk cheap enough to throw away, rather than cheap as a flat screen display But it also sets limits on transistor size, which hurts clock speed a *lot* given that basic properties are a long way below silicon.
The other question is how many steps took place in vacuum. AFAIK most organic compnenets are sensitive to water vapour. In the real world every vacuum cycle would add a lot of time and money to production cost.
"So once some kind of support and protective layers are added, I wonder how think the whole device becomes?. "
Actually it would have to get a *lot* thicker before you would even realise you were holding something in your hand. Writing paper is roughly 40-60microns, stiff card 100microns. Metal shim stock (standard industrial material) is metal sheet in the thousandths of an inch range. 2 thou (50microsn) is fairly common. The layers in the report are namometres, 1000x smaller.
A credit card is roughly 700 microns.
If you stacked all the active layers together even a *very* high layer count would be difficult to see. However your back to getting all those layers to line up almost perfectly. device layers on substrate you align to each other seems the safer option. The odds are most of the device would be a battery anyway.
Disposable paper based batteries already exist. Actually there are multiple other technologies which could serve as volatile or non volatile memory (MIT "Things that Think" project for example). It seems the technology is approaching the critical mass needed to field complete devices of some kind.
The issue is to do what?