back to article Tilera gooses 64-core mesh processor

A year ago, at the annual Hot Chips conference for chip designers in Silicon Valley, a company called Tilera came out of stealth mode and launched its 64-core Tile64 mesh processor. The Tile64 chip takes multi-core to an extreme, and an on-chip iMesh network allows a grid of cores and memory controllers to compete with X64 or …

COMMENTS

This topic is closed for new posts.

Need development environments

I'd love to see something like this aimed at a reasonable price for developers. Every time a technology like this arrives, it's always in the stratosphere for price.

0
0
Boffin

what no SIMD ,did you forget about Kilocore

its a shame they didnt produce a 64bit, 128 bit or even 256 bit for the near future, and made the newest simpling one a 128 or 130 core cpu, then you have 2 spares ;)

but WHY didnt they include some form of SIMD in their cpus thats a very good selling point in todays market place, hell they might have even thought about licencing and/or producing an Altivec SIMD clock for clock beating Alivec 128bit SIMD style co-pro.

eventhe cell's 8 SPE units SIMD abilitys might be a good model to follow, or even the on the fly, programable FPGA PPC based 'KiloCore' for the PPC based FPGA re-programable chip with 256 and 1024 8-bit Processing Elements running at 125 MHz each in 2006 .

its a shame they seem to have gone quiet, im not even sure they exist anymore but the combination of this mesh processor crossbar story, the PPC Altivec, Cell SPEs, and the low power KiloCore 256 tech capabilitys would still be werth collaberating on along side the latest and greatest x86 and CPUGPU most of you all talk up at the exclusion of most other innovations.

perhaps you can do some followup on them and see were they are now, and weather they have managed to progress in any up and coming markets!

http://en.wikipedia.org/wiki/Kilocore

i would live to have some low power and small router sized motherboard with all this tech on to play with and perhaps produce some interesting wireless end users kit.

it's as though all the current SOC and other low power kit you can buy seem to be missing some generic part or other .you can buy off the shelf as an extra addon today,.

whatever happened to building your inclusive kit for the future mass markets and in an innovative way but include the current up and coming tech into your base motherboard so anyone can use it and find real innovative ways to use it in the future, as they did in the retro kit of years gone by.

0
0
Anonymous Coward

Supercomputing

Well, I have an application for one (or five) of these and I'd be perfectly happy with integer processing... I want one!

(Also, some hash would be nice. For home.)

0
0
Silver badge

FPU

I agree that missing an FPU is a dent in their usability.

Why not just replace a couple of their cores with FPUs? With the cache architecture they have, it would be a simple matter to run SIMD on a bunch of data in the cache, offloaded and separate to the processor core, queued and shared between cores.

I actualy think this would be great for standard CPUs aswell. Consider a Phenom (for example) with an additional FPU, so a core can just ensure the data is available in L3, and then queue a few SIMD or MIMD routines for the FPU to run. It then gets told when the job is complete, and can grab the data and do what it wants. In fact AMD is probably in the best situation to do this, as it could use designs from ATI's gfx chips to do it.

Oh well. The Tile[Pro] chips are still cool, and I want one (or more) to play with. Bet they'll be out of my price range though...

0
0
Boffin

A couple of points

If they've got a modified GNU compiler running, then it's safe to say either OpenMP or MPI will at some point be usable on such chips.

Secondly, I note that they do mention DSP chips -- they'll be able to handle floating point. DSPs seem to be the way HPC's going anyway (large matrix operations on CPUs run into processor cache performance limitations), which is why the likes of CUDA and CTM exist.

0
0

Transforming the TILE64 into a Kick-Ass Parallel Machine

The CPU is a soon-to-be a dinosaur, an ancient technology that somehow escaped from a museum of the last century. Tilera should design its own processor core. The CPU, a sequential core, has no business doing anything in a parallel processor. It does not make sense. You're either parallel or sequential, take your pick. What is needed is a pure MIMD vector processor and dev tools based on a true parallel programming model, as opposed to the old multithreaded sequential crap. Tilera should get in bed with Nvidia and Nvidia should change its SIMD GPU into a pure MIMD vector processor. This way, they can have a homogeneous multicore processor that can handle anything, not just graphics. Tilera's Imesh technology is just what is needed to solve the cache coherency problem and will serve as an ideal vehicle for effective hardware-enabled load balancing. Heck, Nvidia should immediately acquire Tilera by making them an offer they can't refuse. Nvidia has the chance of a lifetime to dominate the computer industry for decades to come.

The writing is on the wall. The CPU is dead. Good riddance. MIMD vector processing is the name of the new multicore game.

Transforming the TILE64 into a Kick-Ass Parallel Machine:

http://rebelscience.blogspot.com/2008/08/transforming-tile64-into-kick-ass.html

0
0

FPUs

The lack of them just means that the OS has to emulate one, not too difficult since they can easily be expressed as two integer values, the mantissa and the location of the decimal(provided I haven't confused the terminology). Not as efficient, but definitely doable. But honestly, with 64 cores, I doubt it's going to matter too much.

0
0
This topic is closed for new posts.

Forums