A long time coming
I remember having a presentation from an IBM bod from Montpellier describing a merged archetecture about 20 years ago (I wonder if the non-disclosuer agreement is still enforceable?). This was using a unified backplane with common components, that you plugged the relevent processor card into, and had scheduled using a hardcoded VM implementation that on reflection looked like the current hypervisor. It used common memory between all processors, with IO performed through the VM. The project was at that time called Prism, a term that has been used more recently just in the mainframe world for a hardcoded VM implementation (maybe that is a spin off from the same research project).
I also remember about 15 years ago when it was announced that the Boca Raton people had taken the PowerPC roadmap, and inserted the ppc 615 (I think) processor to run OS/400, extended with additional instructions to assist the running of that OS (and in the process, I understand, rescued the floundering PowerPC family, because Austin were having difficulty getting the ppc 620 (the first 64 bit member on the roadmap) running). Everyone in IBM was talking about merged product lines again then.
The smaller mainframes have long used microcoded 801 (the IBM RISC chip before RIOS and PowerPC) and PowerPC cores in such systems as the 9371 and air-cooled small zSeries systems. I wonder if the full unification of the product lines is still on someones roadmap? I'm sure that I was on a machine room some in the last couple of years, and had difficulty differentiating a p670 and a small mainframe that was close to it on the floor.
In reallity, a lot of the memory, disks, tape drives and I/O cards have been almost identical between the AS/400-RS/6000 and [pi]Series for many years (back to when the RS/6000 was launched), with the only real difference being the controller microcode, the feature numbers and the price!