Does Mr Barroso (and even Mr Vance) have any idea how computers work?
Using Mr Barroso's metrics, core memory is 100% efficient. It uses no power at all while idle. Unfortunately it's hard to come by these days, and if you can get it, it doesn't offer quite the kind of performance that people have been used to for the last, oh thirty years or so.
Meanwhile, the DRAM that makes modern computers work as they do is called DRAM because it is inherently *dynamic* not static; it *must* be actively refreshed, very frequently, even when it is not actively being accessed, or the data evaporates. No big saving there then, not with today's technology anyway.
Disks were and are still mechanical devices. They're either up to speed, and working really quite nicely thank you (in the core memory days, a foot of 19" rack space got you 2.5MB , these days it gets a bit more than that while using very roughly the same number of kW), or they're not up to speed and relatively useless for a while. A few drives today have "quiet" modes which are probably also slightly lower power modes, but on the whole there's not much of a saving to be had unless you can shut disk drives down for significant periods of time and tolerate a wait when they wake up again.
Flash memory? That's got potential for disk-type storage as far as low power, moderate speed applications are concerned, but in a real read/write application there's a serious worry about wearing them out due to write cycle limitations (ReadyBoost users please note).
Processors? Easy, already done, not much more to do there, is there?
Well maybe there is. Northbridge and southbridge run hot. If you class the northbridge and southbridge as interconnects for the processor, and redesign them (eliminate them) by coupling the high power high performance peripherals more closely with the processor, there may be some savings there. What could we use for that? Something like HyperTransport maybe for peripherals, except there's one big name vendor that doesn't seem to like HyperTransport much, fwhich may be a bit limiting for the wider market.
Memory is a bit more of a problem: as already noted, DRAM consumes power or it forgets, but perhaps if you want the interconnect to use less power, you could use less pins for it. Oops RAMBUS get upset if you do that without asking nicely 'cos they claim to hold the patents.
I reckon the first reply to this article, the one that says manage your workload to match the available capacity, and manage the capacity as required by bringing servers in and out, has it about right for the short term. If you accept that punters may occasionally see brief delays (which they'll happily blame on Windoze or t'Internerd), and occasionally a bit of power may be wasted unnecessarily, you can bring servers in and out of the server farm to match the offered workload reasonably quickly, and you don't have to break any laws of physics to do so. You might need some clever software but Google are good at that anyway aren't they?
So, some nice concepts, Mr Google, but some connection with physical reality would have been useful too.