Its about time a breakthrough was made. Last I heard, Intels roadmaps petered out at 10nm and a section marked "here be dragons".

"other unnamed components (our guess: the screeching souls of the damned)."

then cometh the Pentium 666 at 36.666GHz... you will be amazed at the speed that the souls of the damned can produce.

I once earned 80,000 per year , divide that by 12 to work out a monthly figure and try not to get a complex !

You must have been working for the beast itself ........

................M$.

Hope you're all ok now.

We'll finally be able to use MeII (read: Vista), with some of this New-Tech, with something bordering what we have today on XP Pro!!!

Surely that should be 666.666GHZ ;)

36.666GHz seems too slow for the souls of the damned :D

"We'll finally be able to use MeII (read: Vista), with some of this New-Tech"

Erm, this would be M$ we're talking about?

They usually pitch their products at the processors that are just coming out and with shedloads of memory.

Whatever it is, yer ordinary mortal still won't be able to afford a machine to 'release the full potential of your new purchase'.

The chip will be manufactured in a plant in New England. Unisantis will rename themselves Unisantis Aerospace Corporation. They will call their chip the Nephesch ^9^9. It will be one micron long but will weigh more than Saturn. It will be powered by fermented "holy dung", and when it is turned on it will drive men to madness, and even death will die. And that is why I choose Paris Hilton as my avatar.

So does Moore's Law still apply once we've got this new construct in our C/GPUs...?

I have heard rumours that there has been a breakthrough in smoke technology, so perhaps they're packing higher density smoke into these transistors. I wonder if that will make them as volatile as Dell laptop batteries?

Did you look to the very bottom of the page? Some wonderful, almost undetectable use of PhotoShop skills on some of those images, especially the "16GB Quantum MicroSD Card and adapter"

http://atomchip.com/db4/00366/atomchip.com/_uimages/Adap00000-2.jpg and

http://atomchip.com/db4/00366/atomchip.com/_uimages/Adap16384-2.JPG (Ejected and Mounted, apparently).

This must have been some gimp's April Fool's joke, and he spent far too much time on it.

i never got over the feeling that all the stuff on that website was buillshit, to be honest.

"The 3-D structure apparently reduces the distance that electrons travel, generates less heat and costs less to produce than existing chips."

Hmmm, sounds like the classical "too good to be true" moment... But if the inventor of flash memory is behind it, then I guess we can hope.

Patent squatters.

... everybody says that, but there are two problems to solve before: how to build the things in the first place (as it is now with only 7-8 layers, you already get enough duds ) and how to cool transistors in the centre of that structure.

@auser: silicon dioxide is on the way out, high-k dielectrics based on hafnium are all the rage these days.

The chips aren't going to be 3D! You won't have more than a single layer of transistors*. It's just that the individual transistors will have a more 3D structure. Modern CMOS transistors aren't exactly 2D either mind. *Most* of their characteristics can be modelled by assuming they have a constant cross section - but not all. Hence TCAD simulations of devices are moving from 2D to 3D. This sounds like just another variation on the FinFET idea.

Also remember kids - Moore's Law predicts the performance to cost ratio. Technologies like this (and even 'conventional' CMOS nodes approaching 32nm) may be possible but are likely to be very expensive to develop and produce.

* There isn't much point in putting multiple layers of transistors on a chip. The number of processing steps require multiplies so the cost does to (and some). It already takes hundreds of processing steps to make a CMOS wafer. The cost performance ratio doesn't really improve. There are also problems with heat dissipation, process integration, failure analysis and interconnect. The only advantage is less clock skew, but that has already been worked around by having the multiple clock domains of multi-core designs.